243results about How to "Reduce the amount of memory" patented technology

An input / output processor for speeding the input / output and memory access operations for a processor is presented. The key idea of an input / output processor is to functionally divide input / output and memory access operations tasks into a compute intensive part that is handled by the processor and an I / O or memory intensive part that is then handled by the input / output processor. An input / output processor is designed by analyzing common input / output and memory access patterns and implementing methods tailored to efficiently handle those commonly occurring patterns. One technique that an input / output processor may use is to divide memory tasks into high frequency or high-availability components and low frequency or low-availability components. After dividing a memory task in such a manner, the input / output processor then uses high-speed memory (such as SRAM) to store the high frequency and high-availability components and a slower-speed memory (such as commodity DRAM) to store the low frequency and low-availability components. Another technique used by the input / output processor is to allocate memory in such a manner that all memory bank conflicts are eliminated. By eliminating any possible memory bank conflicts, the maximum random access performance of DRAM memory technology can be achieved.

A network optimization engine can be used to optimize the transmission of network traffic by employing means to prioritize highly compressed network traffic over other network traffic. The network optimization engine accomplishes network traffic optimization by calculating a compression ratio for received data packets and determining whether the calculated compression ratios exceed a compression ratio threshold. The predetermined compression ratio threshold can be a hard coded value or an empirically determined compression ratio threshold that is calculated using a sample of the received network packets. Network packets having a compression ratio that exceeds the compression ratio threshold are classified as highly compressed network traffic and transmitted according to a transmission scheme that is different than a transmission scheme used to transmit non-highly compressed network traffic.

A neural network simulation represents components of neurons by finite state machines, called sectors, implemented using look-up tables. Each sector has an internal state represented by a compressed history of data input to the sector and is factorized into distinct historical time intervals of the data input. The compressed history of data input to the sector may be computed by compressing the data input to the sector during a time interval, storing the compressed history of data input to the sector in memory, and computing from the stored compressed history of data input to the sector the data output from the sector.

The present invention is related to systems and methods that parse and / or translate inbound messages into outbound messages such that disparate computer systems can communicate intelligibly. In one embodiment, a system recursively parses the inbound message such that relatively fewer outbound message structure definitions are required and advantageously decreases the usage of resources by the system. Further, one system in accordance with the present invention allows an operator to configure the identity of a delimiter in the inbound message. The delimiter can span multiple characters and includes the logical inverse of a set of delimiters. The outbound message can be accessed at nodes within a hierarchy, as well as at leaves. Thus, a user need not know the precise location of data within the outbound message. A set of updating rules further permits the updating of an outbound message without having to reparse an entire inbound message.

A method for processing packets in a multi-processor environment, that includes receiving a set-up request packet for a communication session and directing the set-up request packet to a selected one of a plurality of processors. A set-up reply packet is generated at the selected one of the plurality of processors, the set-up reply packet including a virtual identifier assigned to the selected one of the plurality of processors. The set-up reply packet is transported to establish the communication session.