30results about How to "Increase effective capacitance" patented technology

A method of forming a metal-insulator-metal capacitor has the following steps. A stack dielectric structure is formed by alternately depositing a plurality of second dielectric layers and a plurality of third dielectric layers. A wet etch selectivity of the second dielectric layer relative to said third dielectric layer is of at least 5:1. An opening is formed in the stack dielectric structure, and then a wet etch process is employed to remove relatively-large portions of the second dielectric layers and relatively-small portions of the third dielectric layers to form a plurality of lateral recesses in the second dielectric layers along sidewalls of the opening. A bottom electrode layer is formed to extend along the serrate sidewalls, a capacitor dielectric layer is formed on the bottom electrode layer, and a top electrode layer is formed on the capacitor dielectric layer.

A photoelectric conversion device (10) includes a first conductivity type first semiconductor region (10a) located in a pixel region (11), a second conductivity type second semiconductor region (12) provided in the first semiconductor region (10a), for storing a signal charge, interconnecting portions (13 and 14) for connecting the second semiconductor region (12) with a circuit element provided outside the pixel region (11), and an organic film (16) which is provided above a portion located in the pixel region (11) in the interconnecting portions (13 and 14) through an insulating protective film (15) and held at a predetermined potential. The organic film (16) is made of a thermoplastic polyimide resin containing one of a conductive particle and a conductive fiber.

A unity gain buffer shared by a charge pump and an active loop filter in a phase-locked loop is disclosed. The charge pump uses the unity gain buffer to reduce current mismatch in the charge pump andthe active loop filter uses the unity gain buffer in a circuit that increases the effective capacitance of the active loop filter.

The invention discloses a plasma display panel and a front substrate thereof. The front substrate comprises a plurality of pairs of maintaining electrodes distributed on the lower surface of the front substrate, front medium layers covered on the maintaining electrodes and the lower surface of the front substrate, and protective layers covered on the lower surfaces of the front medium layers; each pair of the plurality of pairs of maintaining electrodes comprise public electrodes and scanning electrodes, the public electrode and the scanning electrodes all comprise bus electrodes and transparent electrodes, wherein each transparent electrode comprises a discharge transparent electrode, an extending transparent electrode which extends from the top of one of a plurality of first retaining walls on a rear substrate of the plasma display panel and is connected with each bus electrode, and a connecting transparent electrode connected with the discharge transparent electrode and the extending transparent electrode; and the bus electrodes are arranged on one of a plurality of second retaining walls on the rear substrate of the plasma display panel and a place corresponding to one of the second retaining walls.

The invention discloses a high-density low-parasitic capacitor, comprising a PMOS capacitor, a first capacitor, a second capacitor, a third capacitor and an MIM capacitor, wherein the PMOS capacitor is composed of a polysilicon gate, gate oxide, and a source electrode, a drain electrode and an N-well; the source electrode, the drain electrode and an N-well are connected together; the first capacitor is arranged between the polysilicon gate and the metal at the first layer; the second capacitor is arranged between metals at the same layer; the metal at the first layer is composed of a metal block array, and each metal block and an adjacent metal block thereof are respectively connected with the port A and port B of the second capacitor; the third capacitor is arranged between through holes, and each through hole and an adjacent through hole thereof are respectively connected with the port A and port B of the capacitor; and the MIM capacitor is provided an upper polar plate and a lower polar plate which are respectively connected to the port A and port B of the capacitor. In the invention, the capacitor between the polysilicon gate and the metal layer, the capacitor between the metals at the same layer, the capacitor between the through holes, the MIM capacitor and the like are realized on an MOS capacitor, thus reaching the maximal capacitance on a unit area.

The invention provides a MEMS microphone, comprising a base with an acoustic cavity, a back plate fixed to the base, and a vibrating membrane that is spaced apart from the back plate to form a capacitive structure, and the back plate includes a back plate and fixed electrodes; the vibrating membrane includes an effective vibrating part and an ineffective vibrating part, the effective vibrating part includes a vibrating body facing the acoustic cavity and a fixed arm extending from the vibrating body and fixed to the base, The vibrating body and the part of the fixed arm facing the acoustic cavity jointly form an effective vibration area; the ineffective vibration part is located between two adjacent fixed arms and is spaced apart from the effective vibration part, so The invalid vibration part is at least partially fixed on the base; the fixed electrode has the same shape as the effective vibration area. Compared with related technologies, the MEMS microphone of the invention has better acoustic performance.