Charge pump and active loop filter with shared unity gain buffer

Abstract

A unity gain buffer shared by a charge pump and an active loop filter in a phase-locked loop is disclosed. The charge pump uses the unity gain buffer to reduce current mismatch in the charge pump andthe active loop filter uses the unity gain buffer in a circuit that increases the effective capacitance of the active loop filter.

Description

technical field [0001] The present disclosure relates to generating clock signals, and more particularly, to generating clock signals in phased-locked loops (PLLs) with different power and jitter settings. Background technique [0002] Analog to digital converters (ADCs) based on continuous-time delta-sigma modulators (continuous-time delta-sigma modulators) are widely used in radiofrequency (RF) receiver (RX) applications middle. Typically, a high-order delta-sigma modulator-based ADC using a reference clock (eg, a crystal oscillator) or a less complex lower-order delta-sigma ADC with a higher clock rate is employed. For the second case, in one solution, the clock of the ADC is generated by a frequency-divided local oscillator (local oscillator, LO) clock. However, the LO clock signal may vary based on the tuning channel, causing the ADC sampling frequency to vary, complicating the modem design. Another method is to use a phase-locked loop (phased-locked loop, PLL) circu...

AI Technical Summary

Problems solved by technology

Typically, these PLLs are not optimized for delta-sigma ADCs, therefore, these PLLs consume high power and occupy a large die area, increasing cost

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