The invention discloses a read-operation
control signal generator. The read-operation
control signal generator comprises three
delay circuits with same structures and different
delay time setting; the input terminal of a first
delay circuit is connected with internal
clock signals, three delayed output signals are generated successively by the delay circuits because of rising edge trigger of external
clock signals, and
signal saeq is subjected to miteinander with nonsignals of second output signals and first output signals, and then is output via a noninverting
amplifier;
signal saen1 is output by a noninverting amplifie via first output signals;
signal saen2 is output by a noninverting amplifie via third output signals; zero clearing of the three delay circuits can be realized via rising edge trigger of external
clock signals, third output signals can be delaed by a fourth delay circuit, and zero clearing signals are lower by the fourth delay circuit so as to realize zero clearing of the three delay circuits. The invention also discloses an operation method of the read-operation
control signal generator. The read-operation control
signal generator is simple in circuit structure, and is capable of reducing delay
skew, domain area, and circuit
powder consumption.