68 results about "Fin width" patented technology

A semiconductor device according to an aspect of the invention comprises an n-type FinFET which is provided on a semiconductor substrate and which includes a first fin, a first gate electrode crossing a channel region of the first fin via a gate insulating film in three dimensions, and contact regions provided at both end of the first fin, a p-type FinFET which is provided on the semiconductor substrate and which includes a second fin, a second gate electrode crossing a channel region of the second fin via a gate insulating film in three dimensions, and contact regions provided at both end of the second fin, wherein the n- and the p-type FinFET constitute an inverter circuit, and the fin width of the contact region of the p-type FinFET is greater than the fin width of the channel region of the n-type FinFET.

At least one recessed region having two parallel edges is formed in an insulator layer over a semiconductor layer such that the lengthwise direction of the recessed region coincides with optimal carrier mobility surfaces of the semiconductor material in the semiconductor layer for finFETs to be formed. Self-assembling block copolymers are applied within the at least one recessed region and annealed to form a set of parallel polymer block lines having a sublithographic width and containing a first polymeric block component. The pattern of sublithographic width lines is transferred into the semiconductor layer employing the set of parallel polymer block lines as an etch mask. Sublithographic width semiconductor fins thus formed may have sidewalls for optimal carrier mobility for p-type finFETs and n-type finFETs.

Embodiments described herein generally relate to methods of forming sub-10 nm node FinFETs. Various processing steps are performed on a substrate to provide a trench defining a mandrel structure. Sidewalls of the mandrel structure and a bottom surface of the trench are oxidized and subsequently etched to reduce a width of the mandrel structure. The oxidation and etching of the mandrel structure may be repeated until a desired width of the mandrel structure is achieved. A semiconducting material is subsequently deposited on a regrowth region of the mandrel structure to form a fin structure. The oxidizing and etching the mandrel structure provides a method for forming the fin structure which can achieve sub-10 nm node dimensions and provide increasingly smaller FinFETs.

The present invention provides a method for improving the heat transfer performance of the refrigerant flowing in the tube by making the diameter of the heat transfer tube on the upwind side smaller than that of the heat transfer tube on the downwind side, and even if the heat transfer performance on the upwind side is reduced. The diameter of the heat pipe can also prevent the efficiency of the heat sink from decreasing in the heat exchanger with high heat transfer performance. The heat exchanger has: two rows of heat transfer tubes arranged along the airflow direction; and a plurality of cooling fins arranged separately for each row of the two rows of heat transfer tubes and arranged side by side with a predetermined gap, so that the heat exchange air flows along these gaps, The relationship between the outer diameter D1 of the heat transfer tube on the upper side of the wind and the outer diameter D2 of the heat transfer tube on the lower side of the wind is set as 6mm≤D1<D2≤10.5mm. When the width of the lower fin is W2, the fin widths W1 and W2 are set so that 0.9≦(W1 / D1) / (W2 / D2)≦1.11.