56 results about "Determinism" patented technology

A method and apparatus for representing complex data schemas and generating type validated output documents in a markup language. The methods apply to transforming document type definitions into extensible markup language coded information that can readily accommodate logical constraints imposed by recursion or repetition within the DTD structure. Furthermore, non-determinism arising from repetition or recursion in a data schema is resolved by traversal path coding using a matrix representation of the data schema.

The disclosed embodiments relate to implementation of a trading system, which may also be referred to as a trading system architecture, having improved performance which further assures transactional determinism under increasing processing transaction loads while providing improved trading opportunities, fault tolerance, low latency processing, high volume capacity, risk mitigation and market protections with minimal impact, as well as improved and equitable access to information and opportunities.

In an embodiment, a secure module is provided that provides access keys to an unsecured system. In an embodiment, the secure module may generate passcodes and supply the passcodes to the unsecured system. In an embodiment, the access keys are sent to the unsecured system after the receiving the passcode from the unsecured system. In an embodiment, after authenticating the passcode, the secure module does not store the passcode in its memory. In an embodiment, the unsecured module requires the access key to execute a set of instructions or another entity. In an embodiment, the unsecured system does not store access keys. In an embodiment, the unsecured system erases the access key once the unsecured system no longer requires the access key. In an embodiment, the unsecured system receives a new passcode to replace the stored passcode after using the stored passcode. In an embodiments, a registration code is generated using non-determinism. In an embodiments, a key is generated using non-determinism. Each of these embodiments may be used separately.

The disclosed embodiments relate to implementation of a trading system, which may also be referred to as a trading system architecture, having improved performance which further assures transactional determinism under increasing processing transaction loads while providing improved trading opportunities, fault tolerance, low latency processing, high volume capacity, risk mitigation and market protections with minimal impact, as well as improved and equitable access to information and opportunities.

One embodiment of the present invention provides a system that verifies whether a trace can be produced by a generator. A generator is defined as a finite state machine with a set of input and output signals. A trace is defined as a sequence of assignments of non-parametric input and output signals of the generator. The generator may contain parametric inputs to model non-determinism. The trace does not contain assignments of the parametric inputs. During operation, the system builds a data structure to determine if there exists a sequence of parametric input assignments that can match the non-parametric inputs and outputs of the generator with the ones specified in the trace.

A multiprocessor computer system which provides fault tolerance includes a number of processing sets. At least one of the processing sets is operable asynchronously of a second processing set. A monitor is connected to receive I/O operations output from the processing sets for identifying faulty operation of those units. The monitor is also operable to synchronise operation of the processing sets by signalling the processing sets on receipt of outputs from those units indicative of a plurality of them being at an equivalent stage of processing. The monitor provides for buffering of I/O operations output from the processing sets and for selective forwarding of those I/O operations to an external I/O bus. The processing set may be formed from a single processor or from multiple processors.

A program with complete conditions for a usable mask yields a unitary mask, each try. One mask pattern is used throughout an image, but may be "tiled". Preferably the program, for given mask position, expresses favorability of several candidate pass numbers as a "neighborhood constraint" in the form of a weight; distills the weights into one weight for each pass number; based on that, chooses a number for the position; and iterates for all positions. Many preferences are very useful, e.g. automatically balancing randomness vs. determinism, and several generalized relative notations. Another invention facet uses an input text file of mask constraints; a program reads constraints from the file, applies them, forms a mask and stores/uses it. Another reprocesses a mask for best image quality, fixing its own imperfections of first-round mask forming.

An abnormality detection apparatus for a periodic driving system includes a detection unit; a data obtaining unit for time series data from the detected sound; a determinism derivation unit configured to derive a plurality of values representing determinism providing an indicator of whether the time series data is deterministic or stochastic or a plurality of intermediate variations in a calculation process of the values representing determinism at a predetermined interval from the time series data; a probability distribution calculation unit. The abnormality detection apparatus further includes a determination unit configured to determine existence or non-existence of abnormality in the periodic driving system based on the probability distribution of the values representing determinism or the intermediate variations.

A system and method for automatically improving performance of a first graphical program that performs one or more repetitive operations, e.g., in a loop. The first graphical program may be programmatically analyzed and may be programmatically modified based on the analysis. Programmatically modifying the first graphical program may include programmatically modifying the one or more repetitive operations or the loop performed by the first graphical program, where the modification results in improved performance. In one embodiment, the performance of the first graphical program may be improved by increasing deterministic behavior. For example, deterministic behavior may be especially important for a real-time or time critical application. In one embodiment, determinism may be increased by removing functionality from the first graphical program which causes time latency problems. In one embodiment, one or more additional graphical programs may be programmatically generated to perform the functionality previously performed by the first graphical program, where the one or more additional graphical programs execute simultaneously with the first graphical program.

The disclosed embodiments relate to implementation of a trading system, which may also be referred to as a trading system architecture, having improved performance which further assures transactional determinism under increasing processing transaction loads while providing improved trading opportunities, fault tolerance, low latency processing, high volume capacity, risk mitigation and market protections with minimal impact, as well as improved and equitable access to information and opportunities.

A data transaction processing system including multiple transaction processors also includes an active transaction receiver that sequences all incoming messages from various sources to facilitate transactional determinism, as well as a results arbiter to efficiently decide which transaction processor result to choose as the correct output. The data transaction processing system minimizes overall latency by optimizing which transaction processors and results arbiters are responsive to specific client computer input requests or messages.

A discussion of improving integrated device deterministic response to test vectors. For example, limiting the transmission delay for an integrated device's response within known bounds by synchronizing an initialization training sequence to a reset deassertion. Specifically, the proposal facilitates response determinism from the DUT by synchronizing training sequences and subsequently synchronizing flit transmission to reset assertion as sampled by reference clock.