114results about How to "Simple design and implementation" patented technology

A cardiac arrest monitor and alarm system including an implantable medical device having at least three electrodes, preferably but not necessarily subcutaneous, positioned with respect to a heart organ and forming an orthogonal lead configuration to continuously monitor an electrocardiographic signal of the heart organ. A microdevice, preferably but not necessarily operatively connected to the medical device, detects a deviation from a normal heart electrical activity and emits a signal to an external receiver. Upon verification of the signal from the microdevice, the external receiver activates a programmed annunciator circuit to alert bystanders to deploy an AED and / or activate a communication link automatically transmitting an alarm and the electrocardiographic signal to a remote transceiver.

An application program interface (API) for use in monitoring a computer application executed on a computer system. The API includes software code added to the computer application for assigning a single general reference to characteristic transactional information associated with a transaction to be executed by the computer application. The API further includes an agent for marking the time at which the software code is executed and tagging that time with the characteristic transactional information as the characteristic transactional information is being currently processed by the computer application. The API and its method of operation provide precise measurement of the latency of information flowing through the computer system while being uncomplicated in design and implementation, minimally invasive, and highly scalable.

The invention discloses a channel state information acquisition state, a channel state information feedback method and an apparatus. The channel state information feedback method comprises the steps that: a terminal carries out channel estimation according to received pilot signals to obtain channel estimated values of A antenna ports, wherein the A antenna ports are A antenna ports of network equipment, which send the pilot signals; the terminal determines Q antenna ports according to the channel estimated values of the A antenna ports, wherein Q is smaller than or equal to A and greater than or equal to L, L is a value of RI (Rank Indication) adopted when the network equipment sends downlink data to the terminal, or L is a value of channel RI determined by the terminal; and the terminal determines a first level of pre-coding matrix indication information according to the Q antenna ports and feeds back CSI (Channel State Information) comprising the first level of pre-coding matrix indication information to the network equipment, wherein the first level of pre-coding matrix indication information is used for indicating indexes of the Q antenna ports in the A antenna ports which send the pilot signals.

A method is proposed for transmitting data of a stream to be stimulated, coming from a sender device to a receiver device through a network segment and according to a protocol for packet transportation with acknowledgement. An input device of the network segment performs the following steps for the stream to be stimulated: determining a starting packet associated with a sequence number higher than the sequence numbers of packets in transit via the network segment (packets transmitted but not yet acknowledged positively by the receiver device); selecting, as a function of a consumption of a target bandwidth for the transmission of said stream, of packets of the stream following the starting packet, and for each of which an anticipated positive acknowledgement message must be transmitted; upon reception of a positive message of acknowledgement of the starting packet, launching a temporary phase comprising a step of transmitting to the sender device an anticipated positive acknowledgement message for the starting packet and for each selected packet; discarding the positive acknowledgements received from the receiver device which correspond to the selected packets and for which an anticipated positive acknowledgement message has been transmitted.

The invention discloses an emulational USB intermediate frequency responser used for satellite test and control. The emulational USB intermediate frequency responser used for the satellite test and control consists of a front-end analog-to-digital converter, a digital down-conversion module, a carrier synchronization module, a demodulation filter module, a forwarding modulation module and an output analog-to-digital converter; the connecting relations and the signal flow paths are that: an output signal of the front-end analog-to-digital converter enters the digital down-conversion module for processing; the output of the digital down-conversion module is processed in the carrier synchronization module; an output signal of the carrier synchronization module enters the demodulation filter module for processing; one output signal obtained by the demodulation filter module is remote subcarrier output of a demodulator; the other signal is a ranging signal; the ranging signal enters the forwarding modulation module for processing; and the output signal of the forwarding modulation module enters a digital-to-analog converter; and the output of the digital-to-analog converter is an intermediate frequency output signal of the responser. The emulational USB intermediate frequency responser has high stability, low design complexity, high compatibility, a practical value and an application prospect.

A method of mutual monitoring of components of a distributed computer system for a safety-relevant application in a motor vehicle in particular. The components are interconnected by at least one communication system. To make the mutual monitoring of components as simple and comprehensible as possible and to save on additional hardware components for monitoring, in a plurality of components of the computer system an internal monitoring function which detects faults in the monitored component and a mutual monitoring function which performs a mutual check on results determined by the components and makes a majority selection from the results are implemented, and both the result of the internal monitoring function and the results of the mutual monitoring functions are taken into account in a decision as to whether there is a fault in a component.

The invention discloses a five-coordinate locating mechanism, which comprises an X-direction guide part, a Y-direction guide part, a Z-direction guide part, an A-direction rotating part and a working platform. The structures of the Y-direction guide part and the Z-direction guide part are the same, and moreover, the Y-direction guide part and the Z-direction guide part are arranged in a cross wayto provide the translational movement of the working platform in the X-direction and the Y-direction; the Z-direction guide part provides the translational movement of the working platform in the Z-direction and the rotation of the working platform in the B-direction through the synchronous or the asynchronous movement of Z-direction moving plates at the two sides of the Z-direction guide plate; and the A-direction rotating part provides the rotation of the working platform in the A-direction. The five-coordinate movement of the working platform is realized through mature and reliable structures like screws, guide rails, gear pairs and the like adopted by the five-coordinate locating mechanism. The five-coordinate locating mechanism has good processing and assembling properties, high locating precision, and large bearing capacity. Moreover, five coordinates control the movement in a relatively independent way, and kinematics analysis and solution are simple, therefore, the control is simpler.

The present application relates to a near field communications (NFC) receiver in which a received NFC signal comprising a carrier signal onto which a data signal is modulated is digitised and downconverted, and the digitised and downconverted received signal is filtered to recover a digitised and downconverted version of the carrier signal of the NFC signal. This digitised and downconverted version of the carrier signal is converted into an analogue signal which is then upconverted to generate an estimate of the carrier signal, and this estimate is combined with the received NFC signal to suppress or negate, at least partially, the carrier of the received signal.

Computer systems may be instrumented using a minimally invasive API that allows the execution time of every task in an application to be measured and transactional information to be tagged to the measurement or timing data. Preferably, the measurement data is also associated with related measurement data from other components or systems of the same business entity in order to give precise latency data and statistics for transactions that involve more then one segment of a business' operations.

A method of mutual monitoring of components of a distributed computer system for a safety-relevant application in a motor vehicle in particular. The components are interconnected by at least one communication system. To make the mutual monitoring of components as simple and comprehensible as possible and to save on additional hardware components for monitoring, in a plurality of components of the computer system an internal monitoring function which detects faults in the monitored component and a mutual monitoring function which performs a mutual check on results determined by the components and makes a majority selection from the results are implemented, and both the result of the internal monitoring function and the results of the mutual monitoring functions are taken into account in a decision as to whether there is a fault in a component.

The invention discloses a session implementation method and a session implementation device for a distributed consistency system, a session management method for the distributed consistency system, and a session participating method and a session participating device of a proxy server. The session implementation method for the distributed consistency system comprises the steps of sending a session registration request to a server side; receiving a session identifier generated based on the request and sent by the sever side; and sending a service request carrying the session identifier to the server side. By using the method, design implementation of the distributed consistency system is simplified, and system complexity is reduced; unusable time of the service when connection abnormity caused by network jitter and server upgrade occurs is shortened, and processing efficiency is improved; the proxy server is introduced between a client and the server side, a connection number between the server side and the client is increased, and thus processing efficiency of the system is improved.

The invention comprises a method and device for cell culture analysis using microporous membranes to control fluid flow in a device. The microporous membranes are of defined porosity and surface area to effectively increase the fluidic circuit resistance and control fluid flow through the device.

The invention provides a NURBS curve interpolation method with processing path length being known. The method is characterized by calculating acceleration process displacement and deceleration process displacement through a five-phase flexible acceleration and deceleration method; carrying out classification on speed planning types according to the processing path length; calculating total interpolation point number of a NURBS curve with the processing path length being L; calculating feed speed of a current interpolation point; and obtaining interpolation point parameters and coordinate values in each interpolation period. Through acceleration and deceleration processing before interpolation, the method improves processing feed speed to be maximum degree on the basis of meeting machine tool acceleration and deceleration capability; and through acceleration and deceleration processing before interpolation, interpolation point parameters do not need to be adjusted again, such that not only machining precision can be improved, but also high-speed machining is realized.

The invention discloses a device and a method for using a radio frequency antenna as an FM (Frequency Modulation) modulating antenna. The device comprises the radio frequency antenna, a matching isolating circuit, a low-noise amplifying circuit and an FM modulation-demodulation chip, wherein the radio frequency antenna is used for receiving an FM modulating signal and a radio frequency signal used for normal communication; the matching isolating circuit is connected to the radio frequency antenna and is used for isolating the radio frequency signal, matching the FM modulating signal and outputting the FM modulating signal within a preset frequency band; the low-noise amplifying circuit is connected to the matching isolating circuit and is used for amplifying the received FM modulating signal; and the FM modulation-demodulation chip is connected to the low-noise amplifying circuit and is used for demodulating the received FM modulating signal and outputting an analog audio frequency signal. In the device, the radio frequency antenna is used as the FM antenna, the matching isolating circuit is used for efficiently separating two paths of signals, the quality of the FM signal is excellent, the anti-jamming capability is excellent, the earphone playing is supported and the external loudspeaker playing is also supported. The problem of structural assembling is avoided, the cost is low, the device is easily designed and realized, and the device is suitable for all the wireless terminal products supporting an FM function.

A treatment device includes one or more treatment stations each including an electron-beam emitter and supporting device for supporting a container beneath the emitter, the emitter being capable of emitting an electron beam passing through the upper opening of a container supported by the supporting means, so as to sterilize the container, and a protection system for stopping the radiation emitted by the emitter(s). The protection system includes an upper portion connected to the emitter, lower portion connected to the supporting device and a moving device capable of moving the upper portion relative to the lower portion, between a retracted position and at least one operative position in which the portions from a protective enclosure in which the emitter and container are positioned.

The invention discloses an experimental method based on a thermo-motive disaster multi-parameter spatio-temporal evolution analysis experiment table. The method comprises the steps of 1, determining a mine simulation object and establishing an experiment table device; 2, detecting the airtightness of the experiment table device; 3, initializing an experiment control terminal; 4, controlling the change of ventilation quantity in a roadway simulation module, roof caving position, roof caving degree and smoke and gas discharge position and speed, and acquiring the mine thermo-motive disaster multi-parameter spatio-temporal evolution process; 5, judging whether the concentration of gas and oxygen in the roadway simulation module reaches a critical threshold value causing gas explosion; 6, triggering secondary gas explosion in the roadway simulation module and analyzing thermo-motive disaster multi-parameter spatio-temporal change. Steps are simple, mine roadway ventilation quantity, roof caving phenomenon and the change of smoke and gas generating rates of different positions can be simulated, the position where secondary gas explosion occurs easily in the roadway simulation module can be acquired, and thermo-motive disaster multi-parameter spatio-temporal change can be analyzed.

The invention proposes a multi-port automatic clamp loss and phase compensation method based on through line. The method comprises: using a time-domain method to obtain the phase displacement; in combination with a radial neural network, fitting the loss of a through line; and removing the influence of the through line clamp between a coaxial reference face and a detected component's reference face to obtain the scattering parameters of the multi-port detected component. The method of the invention is based on the multi-port automatic clamp loss and phase compensation based on a through line. Without the use of various calibration components for embedding removal calculation, the requirement on the calibration components and the complexity in calculation are reduced. Simply designed, the method can perform automatic loss and phase compensation through the multi-port non-coaxial clamp. The S parameter testing precision is increased, and the influence of the clamp on the testing result is removed.

A process for realizing an integrated electronic circuit makes it possible to obtain transistors with p-type conduction and transistors with n-type conduction, in respective active zones having crystal orientations adapted to each conduction type. In addition, each active zone is electrically insulated from a primary substrate of the circuit, so that the entire circuit is compatible with SOI technology.

The invention relates to the technical field of streamline operating analog-to-digital converters, and discloses a front-end sampling hold and margin amplification circuit of an analog-to-digital converter. The circuit comprises an operational amplifier, a first switching capacitor unit, a second switching capacitor unit and two sampling switches, wherein the first switching capacitor unit and the second switching capacitor unit are alternately combined with the operational amplifier and the two sampling switches to form the sampling hold or margin amplification circuit. In a sampling phase, the first switching capacitor unit or the second switching capacitor unit and the two sampling switches sample the current signals, and meanwhile the second switching capacitor unit or the first switching capacitor unit and the operational amplifier amplify the margin (the part of signal removal quantization) of the last sampled signals; and in a holding phase, the first switching capacitor unit or the second switching capacitor unit and the operational amplifier hold the current signals. The circuit can realize the functions of a front-end sampling hold circuit and a fist-stage MDAC circuit of the streamline analog-to-digital converter with lower power consumption at the same time, and improve the precision of the streamline analog-to-digital converter.

The invention discloses an RRAM sensitive amplifier, comprising a storage branch, a reference branch, a comparison and output circuit and a pre-charging enhancement circuit. The storage branch is used for converting state of a variable resistor in a memory cell into corresponding voltage signal Vmat; the reference branch is used for converting reference current into corresponding reference voltage Vref; the comparison and output circuit is used for comparing the voltage signal Vmat with the reference voltage Vref, and outputting standard logic high level or low level corresponding to low or high resistance state of the variable resistor; and the pre-charging enhancement circuit is used for communicating the storage branch and the reference branch during the pre-charging stage. According to the RRAM sensitive amplifier, a function of reading state of the variable resistor in the RRAM memory cell can be successfully realized; with the pre-charging enhancement function, the time of the pre-charging stage is shortened, and consequently, the whole data reading cycle is shortened, data reading speed is increased, and data throughout of the memory is improved. Result of simulation verification shows that data reading cycle is shortened by 10ns-15ns as compared with the data reading cycle in the traditional scheme in the scheme of the invention.

The present application relates to a near field communications (NFC) receiver in which a received NFC signal comprising a carrier signal onto which a data signal is modulated is digitised and downconverted, and the digitised and downconverted received signal is filtered to recover a digitised and downconverted version of the carrier signal of the NFC signal. This digitised and downconverted version of the carrier signal is converted into an analogue signal which is then upconverted to generate an estimate of the carrier signal, and this estimate is combined with the received NFC signal to suppress or negate, at least partially, the carrier of the received signal.

The invention discloses a speech recognition character index based method and a system for searching. The method comprises that a user inputs basic characters through speeches, and speeches of all basic character combinations read out by the user are recognized, translated into basic character combination text indexes, further translated into standard key events, touch screen events and user-defined events recognized by the user and transferred to an application scenario or an application interface to be searched through a standard event transfer function, so that searching of speech recognition character indexes can be achieved. The system comprises a speech recognition engine service device, a reading and translating device, a translating recognition device and a matching device, wherein the speech recognition engine service device is used for recognizing basic characters input by the user through speeches, and basic characters serve as character indexes for speech recognition. By the aid of the method and the system, the quick searching function of speech recognition character indexes is achieved.

The invention discloses an implementation method and a system of smart card applications, which relates to the technical field of smart card virtual machines. The method disclosed by the invention comprises the following steps: generating binary executable .p files in advance, wherein every generated binary executable .p file corresponds to one smart card application; downloading the generated .p files into a storage region of a smart card; and when the smart card application corresponding to any .p file is started, simultaneously starting the smart card virtual machine and executing byte codes in the .p file for realizing the corresponding smart card application functions of the .p file. According to the technical scheme disclosed by the application, the decoding efficiency of the smart card virtual machine can be improved, the space utilization rate of the smart card can be improved, and the safety and the transportability of the applications on the smart card can be further upgraded.

The invention discloses an isolated-type photovoltaic grid-connected inverter with a dual-branch structure and a working method of the same. The inverter comprises a main circuit, a dual-core DSP main control circuit and an auxiliary switch power source circuit, wherein the main circuit comprises a preceding-stage boosting module, a full-bridge topology inverter circuit and an output filtration module which are connected in succession, the preceding-stage boosting module comprises two branches, and each branch comprises an input filtration module and a high-frequency isolated boosting circuit; and the dual-core DSP main control circuit comprises a first DSP controller and a second DSP controller, the first DSP controller is used to drive the high-frequency isolated boosting circuit and realize tracking and control of a point with the maximum output power on a preceding-stage dual-way solar cell panel, the second DSP controller is used for full-bridge inverter control and grid-connected current inverter control, and the first DSP controller and the second DSP controller are connected by a GPIO module. The isolated-type photovoltaic grid-connected inverter with the dual-branch structure and the working method of the same disclosed by the invention adopt dual DSPs, can realize time-divided independent control, and can increase a safety response speed of a system. Meanwhile, the preceding-stage boosting module comprises the two branches and has the advantages of high efficiency.

A transmission parking lock has an actuating rod that is essentially translationally displaceable, which bears an actuating element, and with a locking lever that is essentially rotationally displaceable, bears a locking element For inserting the transmission parking lock through the displacement of the actuating rod, the locking lever is pivotable from a resting position of the same into a locked position in such a manner that the locking element engages in a recess of a gear wheel (8) allocated to a gear shaft, and with a device that withdraws the actuating element of the actuating rod in the resting position of the same from the locking lever.

Data of a stream to be stimulated is transmitted from a sender device to a receiver device through a network segment. An input device of the network segment determines a starting packet in transit (packets transmitted but not yet acknowledged by the receiver device), selects, as a function of a consumption of a target bandwidth for the stream, packets of the stream following the starting packet, temporarily stores selected packets received from the sender device, transmits to the sender device an anticipated positive acknowledgement message for each selected packet on behalf of the receiver device, transmits the selected packets to the receiver device, and discards stored selected packets corresponding to positive acknowledgements of transmitted selected packets.

The invention disclosers a four-way full-high-definition video processing circuit based on a field programmable gate array (FPGA). The circuit comprises an FPGA chip. The FPGA chip comprises a storage controller, a channel selection switch module, a first video layer overlaying module, a second video layer overlaying module, a third video layer overlaying module, a fourth video layer overlaying module, a video time sequence control module, a video composition module, a video mode parameter controller, four video input processing modules and four video amplifying modules. The picture-in-picture and picture-out-picture video processing circuit based on the FPGA chip is utilized, the requirements for collecting multiple ways of full-high-definition video signals simultaneously are met, and the circuit further has the advantages of being simple in structure, easy to design and achieve and the like. The four-way full-high-definition video processing circuit based on the FPGA can be widely applied to the field of high-definition video processing.