39results about How to "Shrink state space" patented technology

The invention provides a high-extensibility and high-maintainability source code defect detection method and a high-extensibility and high-maintainability source code defect detection device. The method comprises the following steps of: (1) converting a source code which is configured by a user and needs to be detected into an abstract syntax tree and a control flow chart and transmitting the abstract syntax tree and the control flow chart into an analytical engine; (2) performing flow-insensitive analysis on the source code according to the abstract syntax tree and the control flow chart, submitting an analysis result to a defect reporting module, and entering a step 3 to perform path-sensitive analysis; (3) performing various types of path-sensitive modeling and analysis on the source code to generate original defect information according to the abstract syntax tree and the control flow chart; and (4) reducing and simplifying a defect path and reporting the defect path to the user according to the original defect information. The device comprises three functional modules, namely a compiler front end, the analytical engine and the defect reporting module. The invention aims to provide the source code defect detection method and the source code defect detection device which have the characteristics of high extensibility, high maintainability, modularization and the like.

The invention belongs to the field of Internet search, and discloses an integrated analysis control method for Internet character search information. The fragmentary information searched by the webpage search module is integrated by using the webpage information collection module, and the search information is divided into categories through the information classification and extraction module. Identity information, account information and other types are compared by the information comparison module, and the unknown information is stored in the information storage module or the known information in the information storage module is read. The invention can integrate Internet search information and store the information in the information storage module for future use, which is beneficial to integrate scattered information on the Internet; more efficient search and can prevent manual search omissions.

The invention discloses a dynamic vehicle route optimization method for fresh agricultural products divided into regions and multi-stages, which comprises the following steps: acquiring data; dividing regions; dividing time periods; designing freshness attenuation functions; minimizing the total distribution cost mathematical model; and minimizing the total distribution cost Mathematical model algorithm design; minimum distribution total cost mathematical model solution; the present invention effectively improves distribution efficiency and reduces distribution total cost, and has high practical significance.

The invention discloses a method for computing full-terminal reliability based on modularity-based division of communication communities, including power communication network community division based on modularity and full-terminal reliability calculation based on minimum road sets. By reducing the complexity of the network topology, the state space of the network is greatly reduced through space decomposition, and the problem of "state space explosion" is alleviated to a certain extent, thereby reducing the time spent by the algorithm on finding the minimum path set. The complexity of the internal topological structure of the communication community divided by modularity is much lower than that of the entire electric power communication and is independent of each other. Parallel computing is introduced into the internal full-terminal reliability analysis, and the final connection topology of the communication community is relatively simple. Analysis of its full-stack reliability is less time consuming.

The present invention relates to a system and method for formal verification of smart contracts based on state space. The system includes: a code compilation module for compiling smart contract source codes into source codes and virtual machine operation instruction byte code sequences; basic block division The module is used to divide the byte code sequence of the virtual machine operation instruction into a set of basic blocks; the control flow graph generation module is used to generate the control flow graph containing the condition identifier; the logic rule module is used to convert the condition identifier into a logic rule condition ; The source code formalization module is used to analyze the behavior elements from the source code and save it as a formal behavior file; the model generation module is used to generate a behavior model file according to the formal behavior file; generate execution according to the logic rule condition and control flow graph Model files; Execution and Validation Modules for obtaining state space reports and state space directed graphs. Compared with the prior art, the invention has the advantages of comprehensive detection, high efficiency, and ability to intuitively reflect abnormal states.

The invention discloses a filtering position selection method against bandwidth consumption-type attacks. The method comprises the following steps: a link congestion complete dependency set CDSset for routing nodes in an attack tree is built; according to an upstream and downstream dependency relation for the link in the link congestion complete dependency set CDSset, a corresponding link congestion dependency tree is built; all link congestion dependency trees form a link congestion dependency forest; and leaf routing nodes in each link congestion dependency tree in the link congestion dependency forest are the optimal filtering positions of the routing nodes in the attack tree against bandwidth consumption-type attacks. Through adopting the filtering position selection method of the invention, the existing filtering strategy can be used for 25% filtering the routing nodes to clear all congestion links, the two are balanced, and network delay caused by router filtering can be greatly reduced.

A method for model checking path reduction based on interpolation comprises: reading a C program, performing grammatical and semantic analysis on the C program, and extracting CFG from an abstract syntax tree; adding safety (S) interpolation and error (E) interpolation to the CFG and extending the CFG; in a process of generating ARG according to the CFG, determining, in each state, whether the safety interpolation and the error interpolation are implied by current path formula. The method improves the verification efficiency by computing the S interpolation and the E interpolation, which makes the algorithm of the model checking a better use in large-scale programs. The S interpolation can be used to avoid the unnecessary traversal, greatly reducing the number of ARG state. The E interpolation can be used to quickly determine whether there is a true counterexample in the program, accelerating the program's verification and improving the efficiency.

The invention discloses a runtime error analytical method based on abstract interpretation and model verification. The method includes the following steps that on the basis of the abstract interpretation theory, the program numerical variable value range is analyzed by the adoption of a forward iteration method, the variable value range information is obtained when program points are stable, and the iterative computations of loop nodes are achieved by the way that loop unrolling and delay widening are combined; the variable value range information at the relevant program points needing to be detected is converted to be in an assertion or hypothesis mode to be plugged into a program according to a runtime error type to be analyzed; the assertion or hypothesis programs are converted into a Boolean formula, wherein the Boolean formula comprises limiting conditions and attributes; the correctness of the attributes in the Boolean formula is judged through an SAT verifier, if correct, it shows that relevant runtime errors do not exist, if not correct, it shows that the relevant runtime errors exist, and relevant counter example paths are output. By means of the method, an equilibrium point is acquired between runtime error analysis precision and efficiency.