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Temporal dynamic push-down network converting method

A conversion method and dynamic technology, applied in the field of software security and reliability research, can solve problems such as difficult verification, state space explosion, and inability to describe real-time multi-thread interaction

Active Publication Date: 2015-12-23
GUILIN UNIV OF ELECTRONIC TECH
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Problems solved by technology

[0004] Since the above model cannot describe the interaction between threads in a real-time multi-threaded concurrent recursive system, for real-time multi-threaded concurrent recursive programs, the formal verification of such programs will cause the problem of state space explosion, which brings great difficulties to the verification

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Embodiment Construction

[0046] The present invention proposes an accessibility analysis method for the time dynamic push-down network model. For the time dynamic push-down network model, the clock equivalence optimization technology based on key points is adopted to dynamically convert the continuous time dynamic push-down network model It is an automatic method for solving the reachability problem of the time dynamic pushdown network model for a discrete dynamic pushdown network model.

[0047] 1. The stage of constructing TDPN model: TDPN model is an extension of DPN model. The basic idea is to introduce a real-time clock describing continuous time into DPN, which is used to describe real-time concurrent recursive programs with dynamic thread creation.

[0048] Based on the syntax and semantics of TMPDN, the conversion methods for converting real-time concurrent programs into TMPDN are divided into three categories: intra-stack migration conversion, inter-stack switching conversion and concurrent ex...

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Abstract

The invention discloses a temporal dynamic push-down network converting method used for describing real-time concurrent recursive modeling including recursive and dynamic thread creation. The converting method includes the steps that a global clock for describing continuous time and real number clocks capable of describing global variables and stack character ages related to time are introduced in DPN, so that asynchronous communication is achieved based on shared memories, and a real-time concurrent system with dynamic thread creation is modeled; for a clock equivalence technology based on integer division, an optimization technology based on a clock key point is given, a clock interval is reduced, and therefore state space obtained after conversion is reduced. As temporal dynamic push-down networks are abstract models of one kind of real-time concurrent recursive programs, the models are converted into the dynamic push-down networks by the clock equivalence optimization technology based on the key point, in this way, it is detected that the models are errors or bugs in the corresponding concurrent recursive program by verifying whether execution of the dynamic push-down networks operates into an error state or not.

Description

technical field [0001] The invention belongs to the field of software security and reliability research, relates to a verification method for a multi-threaded concurrent recursive program, is a reachability solution technology applicable to an abstract model of a multi-threaded concurrent recursive program containing time, and specifically relates to a time dynamic The transformation method for the pushdown network. Background technique [0002] With the development of multi-core technology, concurrent programs have become a hot spot in current program design research. Due to the uncertainty of concurrent execution, it is difficult for traditional testing methods to find hidden errors and loopholes in programs. Model checking is an automatic verification technology through exhaustive search, which has become an important means to ensure the safety and reliability of programs, and can be used as a supplement to testing methods. Reachability analysis is an important core tec...

Claims

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Application Information

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IPC IPC(8): G06F11/36
Inventor 钱俊彦徐力古天龙赵岭忠蔡国永
Owner GUILIN UNIV OF ELECTRONIC TECH
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