129results about How to "Save pins" patented technology

The invention relates to a control circuit and a control method of a flyback convertor and an alternating current-direct current power converting circuit applying the control circuit of the flyback convertor. Within each switch period, an opening signal generating circuit is used for receiving drain-source voltage of a power switch in the flyback converter; when the drain-source voltage reaches valley value, opening signal is generated to control the turn-on of the power switch; a turn-off signal generating circuit is used for generating a turn-off signal after the power switch turns on and a turn-on time interval is completed according to a feedback error signal of a received output electric signal for representing the flyback converter; and the turn-off signal controls the power switch to turn off, so as to lead input current and input voltage of the flyback converter in a same phase and keep the output electric signal of the flyback converter constant.

The invention discloses a flexible resistive-type pressure sensor array and a preparation method therefor. The flexible resistive-type pressure sensor array comprises a surface packaging layer, an electrode layer and a functional layer, wherein the electrode layer comprises a base film and a plurality of thin film metal wires arranged on the base film at equal intervals. The thin film metal wiresare connected with a multi-way gate. The functional layer is a flexible elastic film with a convex microstructure on the surface, and the flexible elastic film is covered by a plurality of conductivemetal wires arranged at equal intervals, wherein the conductive metal wires are connected with an operational amplifier. The thin film metal wires of the electrode layer and the conductive metal wiresof the functional layer are stacked and assembled in a vertical crossing manner. The pressure sensor array provided by the invention has a series of advantages, such as high sensitivity, fast response and recovery, low operating voltage, large array scale, simple preparation process, and low cost.

The invention relates to an embedded self-capacitance touch liquid crystal display device and a data processor and a screen body thereof. The embedded self-capacitance touch liquid crystal display device comprises reuse electrodes, touch controlled switch devices and data processing chips. The touch controlled switch devices are divided into N touch sets. When the data processing chips are used for conducting touch detection and controlling, and after touch controlled ends of the touch controlled switch devices of all touch sets receive connected touch control signals according to touch time slices, all reuse electrodes in the same touch set are electrically connected with a touch module in one touch time slice. Through the scheme of electrode reuse and pin reuse, the pins of the data processing chips of the embedded self-capacitance touch liquid crystal display device are reduced, then the number of the contact bump of a touch detection channel is reduced, the area of the chips is reduced, and the boundary range of a touch display panel is reduced.

The invention discloses an active noise reduction controller which comprises a substrate, a silicon microphone, an ASIC chip integrated through an ASIC technology, and a shell. The silicon microphone and the ASIC chip are fixed to the substrate and disposed in a closed space formed by the shell and the substrate, the silicon microphone and the ASIC chip are connected in a pressure welding manner through a first group of gold wires, and the ASIC chip and the substrate are connected in a pressure welding manner through a second group of gold wires. The substrate or the shell is provided with a sound hole in a position corresponding to the silicon microphone. The substrate is further provided with a lead bonding pad comprising an earphone unit positive end bonding pad, an earphone unit negative end bonding pad, a power input end bonding pad, an audio input end bonding pad and a common grounding end bonding pad, and the lead bonding pad is connected with the second group of gold wires through a printed circuit on the substrate.

The invention provides a built-in self-test circuit, a built-in self-test system and a built-in self-test method for a flash memory. The built-in self-test circuit comprises a self-reading test module, a self-erasing test module, a self-programming test module and a command conversion module, wherein the self-reading test module is used for testing reading operation of the flash memory and sending a reading test result to the command conversion module, the self-erasing test module is used for testing erasing operation of the flash memory and sending an erasing test result to the command conversion module, the self-programming test module is used for testing programming operation of the flash memory and sending a programming test result to the command conversion module, and the command conversion module is used for sending test commands inputted by a test machine to the self-reading test module, the self-erasing test module and the self-programming test module, and sending the reading test result, the erasing test result and the programming test result to the test machine.

The invention provides an improved audio circuit. The improved audio circuit comprises a microphone bias circuit, a microphone circuit, a sensing resistor, a programmable gain amplifier, an analog to digital converter, a filtering module and a digital signal processor, wherein the microphone bias circuit is used for providing a bias voltage; the microphone circuit is used for receiving an audio signal, generating a current signal reflecting the audio signal, and outputting the current signal reflecting the audio signal through an output end of the microphone circuit; the sensing resistor is connected between the bias voltage and the output end of the microphone circuit; a first input end of the programmable gain amplifier is connected with one end of the sensing resistor; a second input end of the programmable gain amplifier is connected with the other end of the sensing resistor; an input end of the analog to digital converter is connected with an output end of the programmable gain amplifier; an input end of the filtering module is connected with the output end of the programmable gain amplifier; and an input end of the digital signal processor is connected with an input end of a filter. The audio circuit can be subjected to high-pass filtering in a digital part without arrangement of any external stopping condenser, so that pins of chips can be reduced, and the cost is lowered.

The invention discloses a lightning protection device comprising a piezoresistor and a gas discharge tube, the piezoresistor is provided with a first surface and a second surface opposite to the firstsurface, and a first electrode connected with the piezoresistor is welded on the first surface of the piezoresistor, and a second electrode connected with the piezoresistor is welded on the second surface of the piezoresistor, one side face of the gas discharge tube is welded on the second surface of the piezoresistor and is connected with the second electrode, and a third electrode connected with the gas discharge tube is welded on the other side face of the gas discharge tube. The invention further discloses a surge protection device comprising the lightning protection device. Due to the direct welding of the lightning protection device with the gas discharge tube through the piezoresistor, the welding pins and welding points are reduced, the circuit loop is shorter, and meanwhile, theresidual voltage of the whole lightning protection device circuit can be lower, and the corresponding time is shorter.

The invention discloses a Profinet communication protocol conversion card and a conversion method. The Profinet communication protocol conversion card comprises an MCU, a CPLD chip and a TPS-1 protocol chip, wherein the MCU is respectively connected to the CPLD chip and the TPS-1 protocol chip; the MCU is used for reading a control instruction of a Profinet master station through the TPS-1 protocol chip and writing data into a frequency converter through the CPLD chip after protocol data processing, and acquiring state data of the frequency converter through the CPLD chip, writing the state data into the TPS-1 protocol chip after protocol data processing and sending the state data to the Profinet master station in order to realize data exchange. The Profinet communication protocol conversion card supports a 8/16-bit parallel bus and is compatible with a hardware interface of an existing 8-bit bus, the software development is easy to realize, the number of chip pins is small, the designis simple, and the development period is short.

The application discloses a display panel, a pixel circuit and a driving method thereof. The pixel circuit includes a driving chip, and a plurality of pixel circuit units and a plurality of detectingcircuit units connected to the driving chip; the pixel circuit unit includes a first switching transistor and an electroluminescent element; each detecting circuit unit includes a selection circuit, and the selection circuit includes a second switching transistor and a connection switching transistor; a first access end of the second switching transistor is connected to an anode of the electroluminescent element in the pixel circuit unit through the connection switching transistor and the pixel circuit unit; the control end of the second switching transistor is connected to a first timing signal end; the second access end of the second switching transistor is connected to the driving chip; and at least two adjacent detecting circuit units are connected in a second direction through connection terminals, and the two adjacent detecting circuit units are connected to the same pin of the driving chip through the connection terminals. The application can facilitate the anode potential detection of a high pixel density display panel, and can improve the display effect of the display panel.

The invention discloses an FPGA chip and an FPGA system and belongs to the field of electrical apparatus elements. A bypass control circuit is integrated with an FPGA chip and is connected with another FPGA chip, so that the regulation of FPGA system layout can be simply and quickly achieved, and the usage amount of pins for the FPGA chips is also reduced. An FPGA chip is characterized in that a bypass controller and a bypass control circuit are arranged in the FPGA chip, wherein the bypass control circuit is connected with the bypass controller; in an FPGA system on which the FPGA chip is arranged, the bypass control circuit is connected with multiple digital signal processors; the bypass control circuit is used for carrying out data bypassing on the digital signal processors according to a bypassing instruction descended by the bypass controller.

The invention discloses a method for controlling a drive circuit of a cold-cathode fluorescence lamp (CCFL), comprising the following steps: sampling a current or voltage signal of the CCFL to generate a feedback signal; detecting the state of the lamp to generate a state signal; processing the state signal and the feedback signal to generate a control signal; comparing the control signal with a frequency sweeping threshold signal to generate a comparison signal; and based on the comparison signal, using the control signal to selectively adjust the duty cycle of a switching control signal output by the drive circuit or control the frequency of the switching control signal output by the drive circuit to be swept highly. The invention also discloses a control circuit for realizing the method. The invention realizes adjusting the duty cycle of the switch of the drive circuit of the CCFL and controlling the frequency of the switch to be swept highly only via a control signal, thus simplifying circuit design and lowering the cost.