199results about "Amplification control device circuits" patented technology

Audio processing methods and apparatus are provided for at least partially compensating for the Fletcher-Munson effect. An audio processor includes a variable filter receiving an input signal and providing a filtered output signal, the variable filter having a fixed cutoff frequency and a quality factor that is controllable in response to a control signal, and a control circuit configured to detect a signal level representative of input signal level in a selected band and to generate the control signal in response to the detected signal level. The control circuit may include a low-pass band select filter and a detector for detecting a signal level in the band selected by the low-pass filter and for generating the control signal.

In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient λ due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.

The present invention relates to a signal processing apparatus and method, a program, and a data recording medium configured such that the playback level of an audio signal can be easily and effectively enhanced without requiring prior analysis.An analyzer 21 generates mapping control information in the form of the root mean square of samples in a given segment of a supplied audio signal. A mapping processor 22 takes a nonlinear function determined by the mapping control information taken as a mapping function, and conducts amplitude conversion on a supplied audio signal using the mapping function. In this way, by conducting amplitude conversion of an audio signal using a nonlinear function that changes according to the characteristics in respective segments of an audio signal, the playback level of an audio signal can be easily and effectively enhanced without requiring prior analysis. The present invention may be applied to portable playback apparatus.

An input processing circuit includes a first and second input transistors for receiving a differential pair of first and second input signals, respectively. At least one resistor is coupled between first terminals of the first and second input transistors. The input processing circuit includes a variable gain amplifier (VGA) circuit. At least one first transistor has a gate terminal, and is coupled between the first terminals of the first and second input transistors. At least one second transistor has a gate terminal, and is coupled between the first terminals of the first and second input transistors. A gate switch is coupled to the gate terminal of the at least one second transistor. The at least one first transistor and the at least one second transistor adjust a gain of the input processing circuit in response to a control voltage. The control voltage is applied to the gate terminal of the at least one first transistor, and the control voltage is applied to the gate terminal of the at least one second transistor through the gate switch.

In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient λ due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.

A circuit includes a first variable resistor having a resistance which is variable in response to a resistance control signal. A resistance control circuit includes a first current source circuit for supplying a first current through a reference resistor. A second current source circuit supplies a second current through the first variable resistor. In operational amplifier has a first input coupled to a first conductor connecting the first current source to the reference resistor, a second input coupled to a second conductor connecting the current source to the first variable resistor, and an output applying the first resistance control signal to a control terminal of the first variable resistor, to force the resistance of the first variable resistor to be equal to a resistance of the reference resistor. The resistance of a second variable resistor of an attenuator is controlled in response to the resistance control signal.

An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.

A gate power control technique for a power amplifier (PA) provides practical improved efficiency at backed-off power levels. It can be applied to the main gate of the output stage of the PA, the cascode gate, or any combination thereof. Both voltage mode and current mode signal processing may be used. The gate power control can be implemented in both open-loop and closed-loop using AC and DC coupled drivers and output stages. It may further use one or more control ports in the radio frequency (RF) signal path.

In a high frequency power amplifier circuit in which bias voltages are applied to the transistors for amplification by current mirroring, this invention enables preventing waveform distortion near the peak output power level by allowing sufficient idle currents to flow through the transistors for amplification, while enhancing the power efficiency in a low output power region. The power amplifier includes a detection circuit comprising a transistor for detection which receives the AC component of an input signal to the last-stage transistor for amplification at its control terminal, a current mirror circuit which mirrors current flowing through that transistor, and a current-voltage conversion means which converts current flowing in the slave side of the current mirror circuit into a voltage. In the detection circuit, a voltage from a bias circuit for generating the bias voltages for the transistors for amplification is applied to the control terminal of the transistor for detection and output of the detection circuit is applied to the control terminal of the last-stage transistor for amplification.

A highly linear variable-gain low noise amplifier is a cascode amplifier. The cascode amplifier includes a gain control circuit, a load circuit, a current steering circuit and an input circuit. The gain control circuit is used for receiving a gain adjusting voltage, thereby generating a resistance adjusting signal and a current steering control signal. The load circuit includes plural variable resistors. The resistances of the variable resistors are adjusted according to the resistance adjusting signal. The current steering circuit is connected to the load circuit through plural current paths for adjusting a current ratio between the plural current paths according to the current steering control signal. The current steering circuit has differential signal output terminals. The input circuit is connected to the current steering circuit. The input circuit has differential signal input terminals.

A circuit includes a first variable resistor having a resistance which is variable in response to a resistance control signal. A resistance control circuit includes a first current source circuit for supplying a first current through a reference resistor. A second current source circuit supplies a second current through the first variable resistor. In operational amplifier has a first input coupled to a first conductor connecting the first current source to the reference resistor, a second input coupled to a second conductor connecting the current source to the first variable resistor, and an output applying the first resistance control signal to a control terminal of the first variable resistor, to force the resistance of the first variable resistor to be equal to a resistance of the reference resistor. The resistance of a second variable resistor of an attenuator is controlled in response to the resistance control signal.

A gate power control technique for a power amplifier (PA) provides practical improved efficiency at backed-off power levels. It can be applied to the main gate of the output stage of the PA, the cascode gate, or any combination thereof. Both voltage mode and current mode signal processing may be used. The gate power control can be implemented in both open-loop and closed-loop using AC and DC coupled drivers and output stages. It may further use one or more control ports in the radio frequency (RF) signal path.

Disclosed is a wideband variable gain amplifier with high linearity that operates in a switch mode. The variable gain amplifier includes a first amplifier unit, a second amplifier unit and a third amplifier unit. The first amplifier unit includes an amplifier, a wideband-matching element, an attenuator and first switching means. The first amplifier unit supports a high gain mode operation and a low gain mode operation. In the high gain mode, the first switching means is short-circuited and an input signal is amplified with a high gain. It is thus possible to reduce noise characteristics of the entire system by a rear stage. In the low gain mode, the first switching means is opened and the input signal is attenuated by the attenuator without an amplification operation. It is thus possible to reduce a non-linearity occurring by the rear stage of the first amplifier unit. According to another embodiment of the present invention, only the first amplifier unit can be independently used in order to amplify a signal. Furthermore, a variable gain amplifier can be implemented by connecting various combinations of the second amplifier unit and the third amplifier unit at the rear of the first amplifier unit.

A variable-gain amplifier has distortion characteristics (IIP3) improved when the gain is attenuated without impairing characteristics with respect to a gain PG and a noise figure NF when the gain is maximum. The variable-gain amplifier has a plurality of parallel-connected dual-gate FETs having first FETs (6), (8) having gates for being supplied with an input signal and second FETs (7), (9) connected in cascade to the first FETs (6), (8), respectively. Gate control voltages (Vcon1, Vcon2) can separately be applied to the second FETs (7), (9), respectively, from voltage control means.