709results about "Phase-splitters" patented technology

A radio frequency amplifier module (500) has a voltage monitor (546) that monitors an input supply voltage of an input power supply (534) and an adjustable power supply (512) that accepts power from the input power supply (534) and produces an adjustable power supply output that has a controllable voltage. The radio frequency amplifier module (500) further has an amplifier (402) that is supplied by the adjustable power supply output and that amplifies a radio frequency signal. The radio frequency amplifier module (500) also has an output controller (546) that is communicatively coupled to the voltage monitor and the adjustable power supply (512). The output controller (546) controls, in response to the input source voltage, the controllable voltage of the adjustable power supply output.

A balanced high-frequency device is constituted by a balanced device and a phase circuit. The input side of the balanced device is connected to an input terminal IN serving as an unbalanced input / output terminal and the output side of it is connected to output terminals OUT1 and OUT2 serving as balanced input / output terminals. Moreover, the phase circuit is connected between the output terminals.

A radio frequency integrated circuit includes a power amplifier, a low noise amplifier, a first transformer balun, and a second transformer balun. The power amplifier includes a first power amplifier section and a second power amplifier section. When enabled, the first and second power amplifier sections amplify an outbound radio frequency (RF) signal to produce a first amplified outbound RF signal and a second amplified outbound RF signal, respectively. The power amplifier provides the first amplified outbound RF signal to the first transformer balun and the second outbound RF signal to the second transformer balun, where the first transformer balun is coupled to a first antenna and the second transformer balun is coupled to a second antenna. The low noise amplifier includes a first low noise amplifier section and a second low noise amplifier section. When enabled, the first low noise amplifier section amplifies a first inbound RF signal to produce a first amplified inbound RF signal, and, when enabled, the second low noise amplifier section amplifies a second inbound RF signal to produce a second amplified inbound RF signal. The low noise amplifier receives the first inbound RF signal from the first transformer balun and receives the second inbound RF signal from the second transformer balun.

A filter module for reducing a DC offset voltage in a radio frequency communication channel is described. A first capacitor is coupled between a first differential input node and a first differential output node. A second capacitor is coupled between a second differential input node and a second differential output node. An active variable resistor is coupled between the first differential output node and the second differential output node. The active variable resistor receives a control signal. The control signal adjusts the value of the active variable resistor, which adjusts the frequency response of the filter module. The rate at which the filter module reduces DC offset voltages is thereby adjusted. The filter module is also adaptable to single-ended applications.

The disclosure generally relates to a method and apparatus for providing high-speed, low signal power amplification. In an exemplary embodiment, the disclosure relates to a method for providing a wideband amplification of a signal by forming a first transmission line in parallel with a second transmission line, each of the first transmission line and the second transmission line having a plurality of superconducting transmission elements, each transmission line having a transmission line delay; interposing a plurality of amplification stages between the first transmission line and the second transmission line, each amplification stage having an resonant circuit with a resonant circuit delay; and substantially matching the resonant circuit delay for at least one of the plurality of amplification stages with the transmission line delay of at least one of the superconducting transmission lines.

An amplifier is operable in push-pull mode, single-ended mode, or a composite mode that is an intermediate between single-ended and Push-pull modes. Moreover, at least one output device may be configured to operate using a high performance AC servo loop that functions the output device as a current source. Still further, a control input driver stage is provided that is capable of supplying sufficient AC current to overcome Miller capacitance induced roll off within the intended frequency spectrum of triode vacuum tubes. Additionally, methods are provided to substantially null or selectively introduce DC magnetic bias within the output transformer core. Still further, a solid state power supply stage provides substantial AC hum reduction during single-ended operation and simultaneously provides output voltage load regulation attributes similar to traditional vacuum tube rectifier circuits.

Embodiments of RF power amplifiers are disclosed that include switched-mode power amplifiers supplied by synchronous buck DC-DC converters. The switched-mode power amplifiers can be used to amplify a limited form of an RF input signal and the supply to the switched-mode power amplifier is varied in response to the envelope of the RF input signal. One embodiment includes a switched-mode power amplifier connected to a synchronous buck DC-DC converter.

An energy-efficient consumer device audio power output stage provides improved battery life and reduced power dissipation. A power supply having a selectable operating mode supplies the power supply rails to the power amplified output stage. The operating mode is controlled in conformity with the audio signal level, which may be determined from a volume control setting of the device and / or from a signal level detector that determines the amplitude of the signal being amplified. The power supply may be a charge pump in which the operating mode uses a capacitive divider to provide for selection of a power supply output voltage that is a rational fraction of the power supply output voltage in a full-voltage operating mode.

A power amplifier includes an input circuit, three power supply lines with voltages successively decreasing in an order of first, second and third power supply lines, a push-side driving circuit and a pull-side driving circuit which receive control signals from the input circuit, three driving signal lines which are led out of the driving circuits, three output transistors which have current paths connected at one ends to the first, second and third power supply lines, and have gates connected to the three driving signal lines, respectively, an output terminal which is commonly connected to the other ends of the current paths of the output transistors, an impedance circuit which adjusts a gate impedance of the output transistor connected to the third power supply line, and a feedback circuit connected between the output terminal and the input circuit.

In one embodiment, the present invention includes multiple gain stages to receive and amplify a differential input signal at different common mode voltages. The stages each may include a pair of linear NMOS gain transistors coupled to a primary coil of a given output transformer. One of the stages may include commonly coupled terminals coupled to a center tap of the primary coil of an output transformer of another stage, and a supply current provided to one of the stages is re-used for the other stage(s).

An electronic apparatus for reducing interference in a desired signal, the apparatus comprising: (a) a plurality of measurement signal lines, each connected to a respective measurement signal electrode; and (b) one or more reference signal lines, each connected to respective one or more reference electrodes; each of said measurement signal lines or a respective group of said measurement signal lines being associated by being in close physical proximity with a respective one of said reference signal lines for a substantial part of their lengths, so that each measurement signal line or signal line group with its corresponding reference signal line forms a measurement signal line or measurement signal line group / reference signal line pair, said electronic apparatus further comprising subtraction means for subtracting an interference on each reference signal line from an interference signal on the associated measurement signal line or from each measurement signal line in the measurement signal line group in that measurement signal line or measurement signal line group / reference signal line pair; wherein at least one of the measurement signal electrodes is arranged to be in direct electrical connection with a subject and at least one of the reference signal electrodes is arranged to be in close physical proximity but not in direct electrical contact with the subject.

A differential amplifier includes a differential amplifying stage and an output amplifying stage. The output amplifying stage includes a first transistor for pull-up, a second transistor for pull-down, a capacitor element, and switches. The first transistor for pull-up is connected across an output terminal and a high potential side power supply VDD and has a control terminal to which is connected a first differential output. The second transistor for pull-down is connected across the output terminal and a low potential side power supply VSS and has a control terminal to which is connected a second differential output. The switches interchangeably connect the capacitor element across the output terminal and the control terminal of the first transistor for pull-up or across the output terminal and the control terminal of the second transistor for pull-down.

An amplifying circuit includes an n-type transistor having a source, a gate coupled to a first bias voltage, and a drain coupled to a first supply voltage through a first impedance circuit. A p-type transistor of the circuit has a source coupled to the source of the n-type transistor, a gate coupled to a second bias voltage, and a drain coupled to a second supply voltage through a second impedance circuit. A first differential input is coupled to the gate of the n-type transistor through a first capacitor and to the gate of the p-type transistor through a second capacitor. A second differential input is coupled to the sources of the n-type and the p-type transistors. A third capacitor has a first end coupled to the drain of the n-type transistor, and a fourth capacitor has a first end coupled to the drain of the p-type transistor and a second end coupled to a second end of the third capacitor. An output of the amplifier circuit is provided at the second ends of the third and the fourth capacitors. The n-type transistor and the first impedance circuit serve as a common-source amplifier for a signal at the first differential input and as a common-gate amplifier for the signal at the second differential input. Similarly, the p-type transistor and the second impedance circuit serve as a common-source amplifier for the signal at the first differential input and as a common-gate amplifier for the signal at the second differential input.