87 results about "Semiconductor nanostructures" patented technology

The present invention provides new compositions containing naearly monodisperse colloidal core / shell semiconductor nanocrystals with high photoluminescence quantum yields (PL QY), as well as other complex structured semiconductor nanocrystals. This invention also provides new synthetic methods for preparing these nanocrystals, and new devices comprising these compositions. In addition to core / shell semiconductor nanocrystals, this patent application also provides complex semiconductor nanostructures, quantum shells, quantum wells, doped nanocrystals, and other multiple-shelled semiconductor nanocrystals.

In some embodiments, the present invention is directed to compositionally-graded hybrid nanostructure-based photovoltaic devices comprising elongated semiconductor nanostructures and an amorphous semiconductor single layer with continuous gradation of doping concentration across its thickness from substantially intrinsic to substantially conductive. In other embodiments, the present invention is directed to methods of making such photovoltaic devices, as well as to applications which utilize such devices (e.g., solar cell modules).

A method of producing a layered semiconductor device comprises the steps of: (a) providing a base comprising a plurality of semiconductor nano-structures, (b) growing a semiconductor material onto the nano-structures using an epitaxial 5 growth process, and (c) growing a layer of the semiconductor material using an epitaxial growth process.

A novel method for fabrication of hybrid semiconductor-graphene nanostructures in large scale by floating graphene sheets on the surface of a solution is provided. Using this approach, crystalline ZnO nano / micro-rod bundles on graphene fabricated using chemical vapor deposition were prepared. UV detectors fabricated using the as-prepared hybrid ZnO-graphene nano-structure with graphene being one of the two electrodes show high sensitivity to ultraviolet light, suggesting the graphene remained intact during the ZnO growth. This growth process provides a low-cost and robust scheme for large-scale fabrication of semiconductor nanostructures on graphene and may be applied for synthesis of a variety of hybrid semiconductor-graphene nano-structures demanded for optoelectronic applications including photovoltaics, photodetection, and photocatalysis.

The invention provides for a nanostructure, or an array of such nanostructures, each comprising a rough surface, and a doped or undoped semiconductor. The nanostructure is an one-dimensional (1-D) nanostructure, such a nanowire, or a two-dimensional (2-D) nanostructure. The nanostructure can be placed between two electrodes and used for thermoelectric power generation or thermoelectric cooling.

Hybrid plasmonic waveguides are described that employ a high-gain semiconductor nanostructure functioning as a gain medium that is separated from a metal substrate surface by a nanoscale thickness thick low-index gap. The waveguides are capable of efficient generation of sub-wavelength high intensity light and have the potential for large modulation bandwidth >1 THz.

A nanostructure sensing device comprises a semiconductor nanostructure having an outer surface, and at least one of metal or metal-oxide nanoparticle clusters functionalizing the outer surface of the nanostructure and forming a photoconductive nanostructure / nanocluster hybrid sensor enabling light-assisted sensing of a target analyte.

A new method for forming an array of high aspect ratio semiconductor nanostructures entails positioning a surface of a stamp comprising a solid electrolyte in opposition to a conductive film disposed on a semiconductor substrate. The surface of the stamp includes a pattern of relief features in contact with the conductive film so as to define a film-stamp interface. A flux of metal ions is generated across the film-stamp interface, and a pattern of recessed features complementary to the pattern of relief features is created in the conductive film. The recessed features extend through an entire thickness of the conductive film to expose the underlying semiconductor substrate and define a conductive pattern on the substrate. The stamp is removed, and material immediately below the conductive pattern is selectively removed from the substrate. Features are formed in the semiconductor substrate having a length-to-width aspect ratio of at least about 5:1.

Methods of metal assisted chemical etching III-V semiconductors are provided. The methods can include providing an electrically conductive film pattern disposed on a semiconductor substrate comprising a III-V semiconductor. At least a portion of the III-V semiconductor immediately below the conductive film pattern may be selectively removed by immersing the electrically conductive film pattern and the semiconductor substrate into an etchant solution comprising an acid and an oxidizing agent having an oxidation potential less than an oxidation potential of hydrogen peroxide. Such methods can form high aspect ratio semiconductor nanostructures.

Example embodiments relate to a biosensor using a nanoscale material as a channel of a transistor and a method of fabricating the same. A biosensor according to example embodiments may include a plurality of insulating films. A first signal line and a second signal line may be interposed between the plurality of insulating films. A semiconductor nanostructure may be disposed on the plurality of insulating films, the semiconductor nanostructure having a first side electrically connected to the first signal line and a second side electrically connected to the second signal line. A plurality of probes may be coupled to the semiconductor nanostructure. A biosensor according to example embodiments may have a reduced analysis time.

A source electrode 105 which is connected to a portion of at least one semiconductor nanostructure 103 among a plurality of semiconductor nanostructures, a drain electrode 106 connected to another portion of the semiconductor nanostructure 103, and a gate electrode 102 capable of controlling electrical conduction of the semiconductor nanostructure 103 are included. The semiconductor nanostructures 103 include a low concentration region 108 having a relatively low doping concentration and a pair of high concentration regions 107 having a higher doping concentration than that of the low concentration region 108 and being connected to both ends of the low concentration region 108. The doping concentration of the high concentration regions 107 is 1×1019 cm−3 or more; the length of the low concentration region 108 is shorter than a length of the gate electrode 102 along a direction from the source electrode 105 to the drain electrode 106; and the length of the gate electrode 102 is shorter than the interspace between the source electrode 105 and the drain electrode 106.

Devices, methods and systems for detecting nitro-containing compounds such as TNT, which utilize semiconductor nanostructures modified by a functional moiety that interacts with the nitro-containing compound, are disclosed. The functional moiety is attached to the nanostructures and is being such that upon contacting a sample that contains the nitro-containing compound, the nanostructure exhibits a detectable change in an electrical property, which is indicative of the presence and / or amount of the nitro-containing compound in the sample. Electronic noses for generating recognition patterns of various nitro-containing compounds, comprising a plurality of nanostructures modified by versatile functional moieties are also disclosed. The devices, methods and systems are suitable for detecting nitro-containing compounds in both liquid and gaseous states and for detecting a concentration of a nitro-containing compound such as TNT as low as attomolar concentrations.

Embodiments of the present invention provide methods to fabricate semiconductor nanostructure / polymer heterojunctions of solar cells. The methods comprise that a conductive polymer is adhered on the surface of semiconductor nanostructures by capillary effect and core-sheath shaped heterojunctions are formed. The incident photo-to-current conversion efficiency (IPCE) of the solar cells having core-sheath heterojunctions can reach 30% or more.

A nanostructure sensing device comprises a semiconductor nanostructure having an outer surface, and at least one of metal or metal-oxide nanoparticle clusters functionalizing the outer surface of the nanostructure and forming a photoconductive nanostructure / nanocluster hybrid sensor enabling light-assisted sensing of a target analyte.

The present invention is directed to compositionally-graded hybrid nanostructure-based photovoltaic devices comprising elongated semiconductor nanostructures and an amorphous semiconductor single layer with continuous gradation of doping concentration across its thickness from substantially intrinsic to substantially conductive. In other embodiments, the present invention is directed to methods of making such photovoltaic devices, as well as to applications which utilize such devices (e.g., solar cell modules).

The invention is in the field of nanostructure synthesis. The invention relates to methods for producing nanostructures, particularly Group III-V and Group II-VI semiconductor nanostructures. The invention also relates to high temperature methods of synthesizing nanostructures comprising simultaneous injection of cores and shell precursors.

A semiconductor structure is provided, which includes multiple sections arranged along a longitudinal axis. Preferably, the semiconductor structure comprises a middle section and two terminal sections located at opposite ends of the middle section. A semiconductor core having a first dopant concentration preferably extends along the longitudinal axis through the middle section and the two terminal sections. A semiconductor shell having a second, higher dopant concentration preferably encircles a portion of the terminal sections, but not at the middle section, of the semiconductor structure. It is particularly preferred that the semiconductor structure is a nanostructure having a cross-sectional dimension of not more than 100 nm.

A source electrode 105 which is connected to a portion of at least one semiconductor nanostructure103 among a plurality of semiconductor nanostructures, a drain electrode 106 connected to another portion of the semiconductor nanostructure 103, and a gate electrode 102 capable of controlling electrical conduction of the semiconductor nanostructure 103 are included. The semiconductor nanostructures 103 include a low concentration region 108 having a relatively low doping concentration and a pair of high concentration regions 107 having a higher doping concentration than that of the low concentration region 108 and being connected to both ends of the low concentration region 108. The doping concentration of the high concentration regions 107 is 1×1019 cm−3 or more; the length of the low concentration region 108 is shorter than a length of the gate electrode 102 along a direction from the source electrode 105 to the drain electrode 106; and the length of the gate electrode 102 is shorter than the interspace between the source electrode 105 and the drain electrode 106.

A new method for forming an array of high aspect ratio semiconductor nanostructures entails positioning a surface of a stamp comprising a solid electrolyte in opposition to a conductive film disposed on a semiconductor substrate. The surface of the stamp includes a pattern of relief features in contact with the conductive film so as to define a film-stamp interface. A flux of metal ions is generated across the film-stamp interface, and a pattern of recessed features complementary to the pattern of relief features is created in the conductive film. The recessed features extend through an entire thickness of the conductive film to expose the underlying semiconductor substrate and define a conductive pattern on the substrate. The stamp is removed, and material immediately below the conductive pattern is selectively removed from the substrate. Features are formed in the semiconductor substrate having a length-to-width aspect ratio of at least about 5:1.

The present invention provides means and methods for producing surface-activated semiconductor nanoparticles suitable for in vitro and in vivo applications that can fluoresce in response to light excitation. Semiconductor nanostructures can be produced by generating a porous layer in semiconductor substrate comprising a network of nanostructures. Prior or subsequent to cleavage from the substrate, the nanostructures can be activated by an activation means such as exposing their surfaces to a plasma, oxidation or ion implantation. In some embodiments, the surface activation renders the nanostructures more hydrophilic, thereby facilitating functionalization of the nanoparticles for either in vitro or in vivo use.

The present invention provides a reproducible preliminary in-situ oxide removal step for patterned self-assisted III-V semiconductor nanowire growth. Here “in-situ” means located within the same treatment environment or apparatus as the nanowire growth process, e.g. with a molecular beam epitaxy (MBE) apparatus or the like. Providing an in-situ process may prevent the formation of a thin oxide layer during transfer of the substrate into the nanowire growth apparatus.

Quantum-size-controlled photoelectrochemical (QSC-PEC) etching provides a new route to the precision fabrication of epitaxial semiconductor nanostructures in the sub-10-nm size regime. For example, quantum dots (QDs) can be QSC-PEC-etched from epitaxial InGaN thin films using narrowband laser photoexcitation, and the QD sizes (and hence bandgaps and photoluminescence wavelengths) are determined by the photoexcitation wavelength.

A nanostructure sensing device comprises a semiconductor nanostructure having an outer surface, and at least one of metal or metal-oxide nanoparticle clusters functionalizing the outer surface of the nanostructure and forming a photoconductive nanostructure / nanocluster hybrid sensor enabling light-assisted sensing of a target analyte.

Hybrid plasmonic waveguides are described that employ a high-gain semiconductor nanostructure functioning as a gain medium that is separated from a metal substrate surface by a nanoscale thickness thick low-index gap. The waveguides are capable of efficient generation of sub-wavelength high intensity light and have the potential for large modulation bandwidth >1 THz.

Quantum-size-controlled photoelectrochemical (QSC-PEC) etching provides a new route to the precision fabrication of epitaxial semiconductor nanostructures in the sub-10-nm size regime. For example, quantum dots (QDs) can be QSC-PEC-etched from epitaxial InGaN thin films using narrowband laser photoexcitation, and the QD sizes (and hence bandgaps and photoluminescence wavelengths) are determined by the photoexcitation wavelength.

The present invention provides methods of forming metal oxide semiconductor nanostructures and, in particular, zinc oxide (ZnO) semiconductor nanostructures, possessing high surface area, plant-like morphologies on a variety of substrates. Optoelectronic devices, such as photovoltaic cells, incorporating the nanostructures are also provided.

The invention discloses a method for preparing a semiconductor nanostructure through directional self-assembly and mask regulation and control. The method comprises: forming a double-layer hard mask layer, a photoetching stacking layer and a buffer layer on a semiconductor substrate, spin-coating a block copolymer (BCP) layer on the buffer layer, and annealing to form a self-assembly template pattern; removing a certain block then to form a photoetching pattern, sequentially transferring the pattern to a buffer layer, a photoetching stacking layer and a second hard mask layer, depositing a dielectric layer on the patterned second hard mask layer, flattening, removing the second hard mask layer then, and transferring the pattern to a first mask layer and a semiconductor substrate by takingthe patterned dielectric layer as a mask. According to the method, the problem of directional self-assembly caused by the thickness of the block copolymer and low etching selectivity among different block molecules in the existing pattern transfer process can be greatly solved.