In a level shift circuit, the
threshold voltage of N-type high-
voltage transistors, to whose gates the
voltage of a low-
voltage supply VDD is applied, is set low. An input
signal IN powered by the low-voltage supply VDD is input to the gate of an N-type
transistor by way of an
inverter. Therefore, even if the potentials at nodes W3 and W4 exceed the voltage of the low-voltage supply VDD,
reverse current flow from the nodes W3 and W4 via parasitic diodes within the inverters into the low-voltage supply VDD is prevented. A protection circuit, composed of N-type
transistor whose respective gates are fixed to the low-voltage supply VDD, is disposed between the two N-type high-voltage transistors N5, N6 and two N-type low-voltage transistors N1, N2 for receiving the complementary signals IN and XIN, thereby preventing the breakdown of those N-type complementary-
signal-receiving transistors.