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950 results about "Real-time operating system" patented technology

A real-time operating system (RTOS) is an operating system (OS) intended to serve real-time applications that process data as it comes in, typically without buffer delays. Processing time requirements (including any OS delay) are measured in tenths of seconds or shorter increments of time. A real-time system is a time bound system which has well defined fixed time constraints. Processing must be done within the defined constraints or the system will fail. They either are event driven or time sharing. Event driven systems switch between tasks based on their priorities while time sharing systems switch the task based on clock interrupts. Most RTOSs use a pre-emptive scheduling algorithm.

Virtual cores and hardware-supported hypervisor integrated circuits, systems, methods and processes of manufacture

An electronic system (1400) includes a processor (1422, 2610) having a pipeline, a bus (2655) coupled to the pipeline, a storage (1435, 1440, 2650) coupled to the bus (2655), the storage (1435, 2650) having a real time operating system (RTOS) and a real-time application, a non-real-time operating system (HLOS), a secure environment kernel (SE), and a software monitor (2310); and protective circuitry (2460) coupled to the processor and operable to establish a first signal (VP1_Active) and a second signal (NS) each having states and together having combinations of the states representing a first category (2430) for the real-time operating system and the real-time application, a second category (2420) for the non-real-time operating system, and a third category (2450) for the secure environment kernel.
Owner:TEXAS INSTR INC

Virtual machine for embedded systemic software development

The unit comprises databank module, interprocess communication module, high reliability module, debugging module, task dispatching module, expension protocol module, clock module, internal memory module and multiintertask communication module. The unit not only provides an operation and development platform with strong function for system software in top large-scale of embedded type to realize independence of top and bottom layers and to increase portability of top application code, but also can collectively transfer the function of some universal modules in top application software into the virtulizer for realization through intermediate component contained with generality in the virtualizer.
Owner:ALCATEL LUCENT SHANGHAI BELL CO LTD

Combined type bionic quadruped robot controller

The invention relates to a combined type bionic quadruped robot controller, which is in a structure similar to a vertebrate nervous system, wherein the controller is divided into a decision layer, a planning layer and an execution layer which respectively correspond to a higher nervous center, a lower nervous center and a motor nerve of an animal. The decision layer for realizing that the robot senses the working environment and generates corresponding motion decision instructions consists of an ARM9 (advanced RISC (reduced instruction-set computer) machine 9) and an environmental information acquisition system, and a real-time operating system is embedded in the ARM9. The core of the planning layer is a walking pattern generator, and is used for planning and solving the motion parameters of each joint according to the decision instructions from the upper layer. The execution layer for controlling the current, the position and the speed of a driving motor in three closed loops consists of a motor controller using a digital signal processor as the core. Data can be effectively transmitted among the three layers in real time through a dual-port RAM (random-access memory) and a CAN (controller area network) bus network. The combined type bionic quadruped robot controller disclosed by the invention has the characteristics of high reliability, high flexibility, extension easiness and maintenance easiness, and has a broad application prospect in the technical field of bionic legged robots.
Owner:BEIJING INSTITUTE OF TECHNOLOGYGY

Device for updating FPGA (Field Programmable Gate Array) from a long distance by CPU (Central Processing Unit) and method therefor

The invention discloses a device for updating an FPGA (Field Programmable Gate Array) from a long distance by a CPU (Central Processing Unit) and a method for updating the FPGA from a long distance by the CPU. The device comprises a controller module, an FPGA module, a configuration module and a buffer module, wherein the controller module is connected with an upper computer in a wired / wireless way, a second GPIO (General Purpose Input / Output) interface of the controller module is connected with an enable pin of the buffer controller, an SPI (Serial Peripheral Interface) of the controller module is connected with a data input end of the buffer module, a first GPIO interface of the controller module is connected with a configuration signal of the FPGA module, a data output end of the buffer module is connected with SPIs of the FPGA module and the configuration module respectively, a FPGA configuration file is updated from a long distance based on MPC5200B and a real-time operation system VxWorks. According to the device and the method, the cost is saved, the operability of the system is improved, the design difficulty is reduced, the on-line updating of the FPGA is easily realized, and the configuration efficiency and the configuration flexibility of the FPGA are improved.
Owner:ZHUZHOU CSR TIMES ELECTRIC CO LTD

System and method for implementing distributed priority inheritance

Priority inheritance is implemented across a distributed system, preferably by use of a mutual exclusion object, referred to as a pseudo-mutex, which provides operations for communicating priority of a task which is held to a different connected processor or node of a network and generating a dummy local command of priority at least equal to that of the held task at the remote processor or node in collaboration with a real-time operating system and middleware. The remote real time operating system then carries out priority inheritance in the normal manner to raise the priority of a blocked task, thus reversing any preemption of that task at the remote processor or node. The increase in priority avoids preemption of lower priority processes and thus increases the execution speed of the executing thread to release the existing lock at an earlier time; allowing a lock to be obtained by the higher priority thread. The middleware serves as an intermediary, communicating messages that include pseudo-mutex arguments or similar communications and requests for enabling priority inheritance across nodes.
Owner:LOCKHEED MARTIN CORP

Universal simulator for aircraft engines

The invention discloses a universal simulator for aircraft engines. The universal simulator comprises an upper industrial personal computer, a simulation measurement and control computer, a display control desk, a combination instrument case with a plurality of instrument hardware modules, an instrument extension case, a signal adaptation unit, a direct-current voltage-stabilized source and a special testing cable. The universal simulator has the advantages that mathematical models of the engines are operated by an embedded high-performance real-time operating system of the simulation measurement and control computer, so that the real-time performance and the effectiveness of simulation experiments can be guaranteed; hardware architectures for forming testing systems are standard PXI [PCI (peripheral component interconnect) extensions for instrumentation] bus open architectures, accordingly, the hardware modules of various mature PXI bus interfaces can be extended and configured according to particular testing application, and the universal simulator is high in automation degree, extensibility and compatibility and good in maintainability; the signal adaptation unit is configured with standard and universal electric connectors by means of integration, and only corresponding matched testing connecting cables need to be replaced, so that electric connection of the testing systems can be quickly reconstructed by the simulator for the engines, and requirements of platforms on the universality can be met.
Owner:GUIZHOU AERONAUTICAL ENGINE INST

Plural operating systems having interrupts for all operating systems processed by the highest priority operating system

Multiple different operating systems are enabled to run concurrently on the same computer. A first operating system is selected to have a relatively high priority (the realtime operating system, such as C5). At least one secondary operating system is selected to have a relatively lower priority (the general purpose operating system, such as Linux). A common program (a hardware resource dispatcher similar to a nanokernel) is arranged to switch between these operating systems under predetermined conditions and modifications are provided to the first and second operating systems to allow them to be controlled by the common program.
Owner:VIRTUALLOGIX
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