43 results about "Memory replacement" patented technology

The invention relates to a method for exchanging at least one energy store of a vehicle and to an energy store exchanging device. The method includes at least method steps for ascertaining the vehicle type and providing vehicle data of the ascertained vehicle type. The vehicle data include data about the arrangement of the energy store in the vehicle. Furthermore, the position of the vehicle is ascertained based on at least one spatial reference point and at least one energy store of the vehicle is replaced.

To facilitate dynamic lockstep support, replacement states and / or logic used to select particular cache lines for replacement with new allocations in accord with replacement algorithms or strategies may be enhanced to provide generally independent replacement contexts for use in respective lockstep and performance modes. In some cases, replacement logic that may be otherwise conventional in its selection of cache lines for new allocations in accord with a first-in, first-out (FIFO), round-robin, random, least recently used (LRU), pseudo LRU, or other replacement algorithm / strategy is at least partially replicated to provide lockstep and performance instances that respectively cover lockstep and performance partitions of a cache. In some cases, a unified instance of replacement logic may be reinitialized with appropriate states at (or coincident with) transitions between performance and lockstep modes of operation.

A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and processing circuitry operably coupled to the interface and to the memory. The processing circuitry is configured to execute the operational instructions to perform various operations and functions. The computing device detects memory error(s) associated with a plurality of sets of memory devices of sets of storage unit(s) (SU(s)) within the DSN that distributedly store a set of encoded data slices (EDSs). The computing device facilitates detection of EDS error(s) associated with the memory error(s). For a set of memory devices, the computing device establishes a corresponding memory replacement priority level and facilitates replacement of corresponding memory device(s) associated with the EDS error(s) based on the corresponding memory replacement priority level.

A high-performance instruction cache method based on extracting instruction information and store in a track table. The method enables reading of all levels of cache, including the last level cache, without performing tag matching. The method enables the content of the track table addressing directly instruction memories in both track cache or in set associative organization. Further, the method includes a memory replacement method using a track table, a first memory containing multiple rows instruction blocks, and a correlation table. The correlation table records source addresses of rows indexing a target row and the lower level memory address of the target row. During replacement of a first memory row, the lower level memory address of the target row replaces the address of the target row in the source row of the track table, and therefore preserve the indexing relationship recorded in the track table despite the replacement.

The invention provides a data cache system and method. The system is connected with a cache memory and a central processing unit CPU, and the data in the cache memory is marked with a weight value, which is used to represent the number of times the data is read in the cache memory. The system includes: a receiving module, used to receive the read data request sent by the CPU; a read module, used to read the corresponding data according to the read data request; a weight value calculation module, used for cache hit The weight value of the data read in the cache memory is increased by 1. When the space of the cache memory is full, the data with a weight value of zero will be randomly selected for replacement when the cache memory needs to be replaced next time. The data caching system and method of the present invention caches the most frequently used content in the cache memory instead of the recently used content, so that it is more rapid and effective to determine the content to be replaced in the cache memory.

The invention relates to a complex event detection method on the basis of an IMF (Instance Matching Frequency) internal and external memory replacement policy. In the method, when a user does not terminate a detection process, an event flow is continuously scanned; a current event is read; an object statistical table is constructed and modified; and different treatments are carried out according to the type of the current event; if the current event is a terminal event, a complex event detection process is triggered and a detected sequence which meets a user defined mode is output; if the current event is a nonterminal event and an internal memory quota of the current event is not full, the internal memory storage of an event instance is carried out on the basis of an object tree and an index thereof; and if the current event is the nonterminal event and the internal memory quota of the current event is full, the internal and external memory replacement of the event instance is carried out on the basis of the IMF policy and the current event is associated with an event instance bit map to carry out external memory storage of each event instance of an replaced object. The complex event detection method can effectively support the large time scale complex event detection and has high efficiency of utilizing the space and processing time.