Data caching system and method
A data cache, data technology, applied in memory systems, electrical digital data processing, instruments, etc.
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[0014] see figure 1 , is a system architecture diagram of a cache memory management system in a preferred embodiment of the present invention. The cache memory management system 10 is a programmable system running on a processor. The processor is connected with a cache memory 30 and a central processing unit CPU20. The cache memory 30 couples the cache memory management system 10 to a main memory 40 .
[0015] The cache memory management system 10 receives a read instruction from the CPU 20 , reads data from the cache memory 30 when there is a cache hit, and reads data from the main memory 40 when there is a cache miss, and stores the read data into the cache memory 30 .
[0016] The data in the cache memory management system 10 is marked with a weight value, and the weight value is used to represent the number of times the data is read in the cache memory 30 . The data in the cache memory 30 has 5 states as follows: the data with a weight value greater than 2 is considered...
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