119 results about "Impedance discontinuity" patented technology

The invention relates to a waveguide manufacturing and a waveguide manufactured with the method, which can be integrated into a circuit structure manufactured with the multilayer ceramic technique. The core part (23, 33, 43, 53a, 53b, 53c) of the waveguide is formed by a unit assembled of ceramic layers, which is limited in the yz plane by two impedance discontinuities and in the xz plane by two planar surfaces (24, 25, 34, 35, 54a, 54c, 55a, 55b, 55c) made of conductive material. The conductive surfaces can be connected to each other by vias made of conductive material (38, 39, 48, 49). The waveguide manufactured with the method according to the invention is a fixed part of the circuit structure as a whole.

An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board. In view of the high frequencies used in today's wireless communication systems, the interconnection structure proposed aids in the practical implementation of radio frequency modules by mitigating the effects of impedance discontinuities ordinarily present at signal trace-to-via transition regions.

An electrical interconnection system with high speed, differential electrical connectors. The connectors are formed with columns of conductive elements, some of which carry signals some of which act as ground conductors. The conductive elements may contain projections to secure the conductive elements in a housing or to facilitate desirable current flow patterns. To avoid impedance discontinuities caused by the projections, adjacent conductive elements may be formed with complementary portions to provide a relatively uniform edge-to-edge spacing between signal and ground conductors along the length of the signal conductor. To manufacture such a connector in which both the signal and the ground conductive elements contain projections, the conductive elements carrying signals may be inserted into a housing from one side and the conductive elements acting as ground conductors may be inserted from an opposite side.

A method for processing radio frequency reflections is provided. The method applies an RF waveform to a transmission line that is a conductor used for providing a utility service. The method uses a RF waveform generator to transmit UltraWideband (UWB) RF waveforms through the conductors of a building. The RF waveforms are emitted at emission points that can be impedance discontinuities along the transmission line or impulse radios. The emitted RF waveforms reflect off of objects in the building and are received at reception points that can be impedance discontinuities or impulse radios. These reflections are processed to determine movement of objects within or near the building. Based on the reflections of the RF waveforms, the position of the objects within or near the building can be determined.

An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board. In view of the high frequencies used in today's wireless communication systems, the interconnection structure proposed aids in the practical implementation of radio frequency modules by mitigating the effects of impedance discontinuities ordinarily present at signal trace-to-via transition regions.

A method and apparatus for sensing conditions in a subsurface geologic formation heated for the extraction of hydrocarbons is disclosed. A time domain reflectometer in conjunction with an open wire transmission line is employed in real time to determine impedance discontinuities in the geologic formation. These impedance discontinuities correspond to physical conditions in the geologic formation. The open wire transmission line can include pipes running into the subsurface geologic formation or other conductors, including a split tube well casing. The method may operate in the low frequency window for subsurface electromagnetic propagation.

Disclosed is a Syntactic Landmine Detector. The syntactic landmine detector processes a received signal from a ground penetrating RADAR which contains at least one spatial sequence, the spatial sequence containing relative spatial information locating impedance discontinuities. The spatial sequence is then associated with at least one physical characteristic of a landmine.

A method, system and apparatus for coating plated through holes (PTHs) to reduce impedance discontinuity in electronic packages. PTH vias are imbedded in the core of a printed circuit board comprising a core layer, a plurality of buildup layers, a plurality of micro-vias, and a plurality of traces. Traces electrically interconnect each of the micro-vias to PTH vias, forming an electrically conductive path. PTHs are coated with a magnetic metal material, such as nickel, to increase the internal and external conductance of the PTHs, thereby providing decreased impedance discontinuity of the signals in electronic packages.

Methods, systems, and apparatuses are provided for three-dimensional coiling via structures. A substrate includes a plurality of insulating layers, a plurality of trace layers interleaved with the insulating layers, and a three-dimensional coiling via. The three-dimensional coiling via includes a plurality of electrically conductive traces and a plurality of electrically conductive vias through the insulating layers. The electrically conductive traces are present in at least two of the traces layers and are coupled together by the electrically conductive vias. The electrically conductive traces are arranged to form at least one partial turn around an axis through the substrate.

A method of routing an integrated circuit package design includes steps of receiving as input at least a portion of an integrated circuit design including a differential pair of two electrical conductors, calculating a value of length mismatch between the two electrical conductors, calculating an added trace length to compensate for an impedance discontinuity of a shorter one of the two electrical conductors, and extending the shorter one of the two electrical conductors by routing the added trace length entirely inside an area surrounded by a contact pad that electrically terminates the shorter one of the two electrical conductors. The routing for the differential pair with the added trace length is generated as output in the integrated circuit design.

Various semiconductor chip carrier substrate circuit tuning apparatus and methods are disclosed. In one aspect, a method of manufacturing is provided that includes assembling a semiconductor chip carrier substrate with a first input / output site adapted to electrically connect to an external component and a second input / output site adapted to electrically connect to an input / output site of a semiconductor chip. An inductor is placed in the semiconductor chip carrier substrate. The inductor is electrically connected between the first and second input / output sites. The inductor has a preselected inductance to reduce an impedance discontinuity between the first input / output site or the second input / output site due to coupling to a second conductor in the semiconductor chip carrier substrate.

A high speed, high reliability connector that may be employed with standard Serial ATA (SATA) or Serial Attached SCSI (SAS) compliant receptacle connectors. The present invention reduces impedance discontinuity by reducing the interconnection length and cross-planar transit found in typical SATA and SAS compliant connectors.

The present invention provides a transmission line portion for a circuit board including a conductive strip and a pad portion including a conductive pad connected to the conductive strip, wherein an impedance discontinuity or mismatch between the transmission line portion and the pad portion is reduced or controlled. Impedance discontinuity or mismatch may be controlled by controlling the dimensions of the pad portion, for example the pad width or distance between pad and ground. A ground pad associated with the pad portion may be provided on a different layer than a ground plane of the transmission line portion. The ground pad and ground plane may be connected by vias. The ground pad may comprise a patterned conductive region, the pattern configured so as to desirably configure impedance of the pad portion. Also provided are a method, circuit board layout, and the like, related to the above.

Package design method for semiconductor chip package for high speed SerDes signals for optimization of package differential impedance and reduction of package differential insertion loss and differential return loss at data rates of 25 to 60 Gb / s and beyond. The method optimizes parameters of vertical interconnections of BGA ball, via, and PTH, and around the joint between vertical and horizontal interconnections of traces. Also disclosed are examples of chip package designs for high speed SerDes signals, including one using 0.8 mm BGA ball pitch and 10-layer buildup substrate, one using 1 mm BGA ball pitch and 14-layer buildup substrate, one using 6-layer buildup substrate with signals routed on top and bottom metal layers with microstrip line structure, and one using 12-layer package substrate with unique via configuration, all of which achieve low substrate differential impedance discontinuity, reduced differential insertion loss and differential return loss between BGA balls and C4 bumps.

An improved multi-layered ceramic package comprises: a plurality of signal layers, each having one or more signal lines; a plurality of vias, each providing one of a voltage (Vdd) power connection or a ground (Gnd) connection; at least one reference mesh layer adjacent to one or more signal layers; and a plurality of via-connected coplanar-type shield (VCS) lines, with a first VCS line extending on a first side of a first signal line within the plurality of signal layers and a second VCS line extending on a second opposing side of the first signal line. Each of the plurality of VCS lines interconnect with and extend past one or more vias that are located along the directional path in which the VCS lines runs. The placement of the VCS lines relative to the signal lines reduces coupling noise and controls impedance discontinuity in the ceramic package.

The invention provides a method and device for arranging passing holes in a single plate. The method comprises the steps of obtaining the data of the passing holes of an anti-pad needing to be added to the single plate, obtaining the data of the anti-pad according to the data of the passing holes, and building a wiring forbidding area according to the data of the anti-pad. By means of the technical scheme, high-speed differential signals can be processed simply and rapidly, the design efficiency of the single plate can be largely improved, the impedance discontinuity degrees of the high speed signals, transmission loss of high-speed wiring of the single plate and the like are lowered, and the signal transmission quality is improved.

The structural and termination characteristics of a telephone or other wiring circuit can be determined by generating a continuous stream of low-energy electrical signals, injecting these into the circuit under test, and analyzing the energy reflected at impedance changes in the frequency domain. Standing waves occurring in the circuit can be identified as a function of frequency and analyzed to locate the impedance discontinuities. An unambiguous numerical representation of the circuit can be generated and used to categorically determine if two circuits are indeed alike, or whether the structural and termination characteristics of a particular circuit has remained the same or changed over time. Waveforms are employed that are not sensed by circuits that carry digital telephone traffic, so that the invention is useful in characterizing and providing security protection for those type of circuits in situ.

A fluid guideline with at least two structural elements made of substantially soundproof material has at least one opening for sound damping. An impedance change (in particular in the form of an impedance discontinuity) of the flow resistance of the fluid flowing through the fluid guideline is present between two adjacent structural elements, and the at least one opening is arranged in the region of the impedance change between two adjacent structural elements.

The invention discloses a high-speed line impedance continuity realization method. The method includes the specific realization steps: selecting a standard impedance value, and computing suitable breakout region routing according to a BGA (ball grid array), namely the space size of a ball grid array packaging region; computing impedance for the breakout region routing to determine suitable copper thickness so as to reach the standard impedance value, and increasing copper coverage on the breakout region routing surface to enlarge signal impedance so as to realize impedance continuity. Compared with the prior art, the high-speed line impedance continuity realization method has the advantages that the purpose of signal integrity is achieved by increasing or decreasing the routing copper thickness within a limited space, signal reflection caused by impedance discontinuity is avoided, signal quality is improved, practicality is high, and popularization is facilitated.

Methods and apparatus are provided for implementing a receiver capable of receiving signals in simultaneous bi-directional current mode differential links. The receiver comprises a resistor-summing network and a differential amplifier. The resistor-summing network can also comprise capacitors for the purpose of attenuating high-frequency noise at the differential amplifier. The high-frequency noise can arise from impedance discontinuities in the signal paths or from differences in rising or falling transition times between the data driver and the replica driver in the links.

The terminating impedance of a networked device in a wired communication channel is controlled to avoid an impedance discontinuity when power is applied and removed from the node or other event occurs that would change the impedance of the signal interface. When the node transmits or receives signals using the communication channel, the transmit or receive device presents a matched termination to the channel. When power is removed or the device is reset, the transmit and receive circuitry is not operational and the matched impedance is therefore maintained by a separate device. The impedance may be varied slowly from a match to a high impedance to allow other devices in the network to adapt to the change in multipath environment that results from the impedance change. Alternatively, the signal interface can be switched to a passive static impedance that is maintained while power is off or the disrupting event occurs.

Methods and apparatus that minimize the impedance discontinuity between a component and a signal trace is described. The methods and apparatus generally comprise at least one signal trace disposed on a dielectric layer, wherein the signal trace comprises a first width which is wider than a second width, a via connected to the first width of the signal trace, and a component electrically attached to the via, wherein an impedance discontinuity between the signal trace and the component is lowered.

A coplanar waveguide biosensor and methods of use include a coplanar waveguide transmission line and a sample containment structure. The coplanar waveguide transmission line is operable to support the propagation of an electromagnetic signal and includes a signal line and one or more spaced apart ground elements. The signal line is configured to conduct a time-varying voltage, and the one or more ground elements are configured to maintain a time-invariant voltage, a detection region being formed between a portion of the signal line and a portion of at least one of the one or more ground elements. Detection methods are improved through the enhancement of the electric field in the detection region via impedance discontinuities in the signal line and ground elements. The sample containment structure intersects the detection region of the coplanar waveguide transmission line and includes a cavity configured to hold 1 ml or less of sample solution within the detection region.

A method and apparatus for sensing conditions in a subsurface geologic formation heated for the extraction of hydrocarbons is disclosed. A time domain ref lectometer (10) in conjunction with an open wire transmission line (12, 14) is employed in real time to determine impedance discontinuities in the geologic formation. These impedance discontinuities correspond to physical conditions in the geologic formation. The open wire transmission line can include pipes running into the subsurface geologic formation or other conductors, including a split tube well casing. The method may operate in the low frequency window for subsurface electromagnetic propagation.

Disclosed is a Syntactic Landmine Detector. The syntactic landmine detector processes a received signal from a ground penetrating RADAR which contains at least one spatial sequence, the spatial sequence containing relative spatial information locating impedance discontinuities. The spatial sequence is then associated with at least one physical characteristic of a landmine.

Discussed herein is a semiconductor package and a method of overcoming multiple reflections while transmitting high speed broadband signals through the semiconductor package. The semiconductor package includes at least one trace having a first terminal that is configured to receive a broadband signal and a second terminal configured to output the broadband signal. The semiconductor package includes a stub which is positioned along a longitudinal length of the trace and is configured to reduce broadband reflections in the trace by causing multi-frequency reflections to destructively interfere with at least some broadband reflections in the trace that occur due to impedance discontinuities. The stub parameters such as stub length, stub impedance and the location of the stub along the trace can be determined to minimize signal degradation.