292 results about "Flicker noise" patented technology

In semiconductor devices in which both NMOS devices and PMOS devices are used to perform in different modes such as analog and digital modes, stress engineering is selectively applied to particular devices depending on their required operational modes. That is, the appropriate mechanical stress, i.e., tensile or compressive, can be applied to and/or removed from devices, i.e., NMOS and/or PMOS devices, based not only on their conductivity type, i.e., n-type or p-type, but also on their intended operational application, for example, analog/digital, low-voltage/high-voltage, high-speed/low-speed, noise-sensitive/noise-insensitive, etc. The result is that performance of individual devices is optimized based on the mode in which they operate. For example, mechanical stress can be applied to devices that operate in high-speed digital settings, while devices that operate in analog or RF signal settings, in which electrical noise such as flicker noise that may be introduced by applied stress may degrade performance, have no stress applied.

Some embodiments discussed relate to an integrated circuit and methods for making it, comprises a semiconductor substrate and a plurality of fins disposed on the semiconductor substrate and a gate insulator disposed on the plurality of fins and a gate stack disposed on the gate insulator and the plurality of fins are implanted by a dopant.

A low voltage, low power, high linearity active CMOS mixer for radio frequency (RF) wireless communication applications consists of high linearity RF transconductor to convert the incoming RF voltage into a RF current; an ac-coupling stage to deliver the RF current to the next stage, and to block the DC signal and the flicker noise of the RF transconductor; followed by a current commutating (mixing) stage to down-convert the RF signal to the desired intermediate frequency (IF), and an IF section that converts the down-converted signal current back to voltage. The invention suggests a novel low-voltage, low-power RF mixer circuit that exhibits a high linearity in terms of IIP2 and IIP3 and is suitable for a low voltage, direct conversion receiver (DCR) which requires a relatively high IIP2. The DCR is a candidate for the fourth generation of mobile communication systems (4G).

The present invention discloses a liquid crystal display and a display panel thereof. The display panel is provided with a common voltage generating circuit added to at least one pixel in an inactive pixel region; the average of positive polarity voltage and negative polarity voltage is acquired in two-frame time according to the display voltage of a drain electrode end of a thin film transistor inside the pixel, so as to be taken as common voltage and sent to every pixel in an active pixel region inside the display panel. Therefore, the present invention can obviously improve the feedthrough voltage (delta VD) shift of scanning voltage which is caused by the RC delay of parasitic capacitance and parasitic resistance on scan lines, then promotes the gray-scale accuracy of every pixel of the active pixel region inside the display panel, and decreases the flicker noise of the display panel, so as to greatly promote the frame quality shown by the liquid crystal display.

A mixer is disclosed that includes first and second transconductance modules that, in one embodiment, includes MOSFETs configured to receive a plurality of signals that are to be mixed and a selectively coupled auxiliary current source to inject an auxiliary current into the second transconductance module approximately at or near a zero-crossing point in order to reduce flicker noise and other noise introduced into an output signal during switching. Accordingly, as a first transconductance module approaches a zero-crossing, auxiliary current is injected to reduce the current produced therefrom thereby reducing flicker noise. In a differential mixer, the amount of current produced from a transistor pair to which the signal cycle is being switched is also reduced thereby reducing noise from the transistor pair that is turning on for the next portion of a signal cycle.

An image coding device for reducing flicker noise in moving image coding based on Motion JPEG-2000, which applies wavelet transform to an input image, quantizes the wavelet transform coefficients, and replaces quantization coefficients of adjacent frames in accordance with a predetermined judgment condition. The device spreads the finally output quantization coefficients into bit-planes from the MSB to LSB, generates coding passes in each bit-plane, performs arithmetic coding in the coding passes, controls the code quantity to a target code quantity from the generated arithmetic codes, and generates a packet of the image data by attaching a header to the arithmetic codes. The quantization coefficients are replaced based on a difference of absolute values of the quantization coefficients at the same sub-band in the adjacent frames. By further adding the wavelet transform coefficients, erroneous detection in the substitution processing can be decreased and the flicker noise can be suppressed effectively. Also, an image coding method for the same.

There are provided a pixel array capable of detecting and removing a flicker noise, an image sensor employing the pixel array and an automatic flicker noise detecting method capable of effectively detecting and removing the flicker noise of the image sensor. For the purpose, a pixel array of an image sensor includes a pixel group, having N×M number of unit pixels, for detecting an image signal, N and M being integers, and a pixel column, allocated along a row direction of the pixel group, for detecting an average frequency of a corresponding pixel row to thereby detect the flicker noise.

The invention relates to a fusion structure of an LNA and a frequency mixer. The fusion structure comprises a low noise transconductance amplifier stage, a switching frequency mixing stage and a resistance loading stage, wherein the low noise transconductance amplifier stage is divided into two parts, a first part adopts a cross coupling main-auxiliary noise offset technology, a main transconductance pipe adopts a cross coupling structure so as to double an equivalent transconductance value, an auxiliary transconductance pipe provides an appropriate transconductance value, and the noise of the main transconductance pipe is offset through the main-auxiliary structure; and a second part adopts a common-source-level structure, then gain is provided, direct current flowing through switching tubes is reduced, and flicker noise is reduced. The switching frequency mixing stage modulates radio-frequency current output from the low noise transconductance amplifier stage and outputs intermediate-frequency current, and source electrodes of two groups of switching tubes are connected through an inductor, so that the flicker noise is reduced, and the conversion gain is improved. The resistance loading stage adopts an RC (current limiting resistor) lowpass filtering network to convert the intermediate-frequency current into an intermediate-frequency voltage signal for outputting. The fusion structure of the LNA and the frequency mixer has the characteristics of low noise, high gain and low power consumption.

Various systems and methods for implementing dynamic logic are disclosed herein. For example, some embodiments of the present invention provide LC tank circuits having an inductance and a capacitance. In addition, the circuits include a flicker noise reducing switch that is operable to selectively incorporate the capacitance such that an output of the circuit operates at a frequency based on a combination of the inductance and the capacitance.

A flicker noise detecting method that shortens the time for detecting flicker noise. The method sets two of a plurality of horizontal lines forming a frame as average brightness calculation regions that are separated from each other by the predetermined number of the horizontal lines, calculates an average brightness of the two average brightness calculation regions for each of three frames, multiplies each average brightness by a product sum calculation coefficient, and adds the products to generate a sum and generate a detection signal of flicker noise based on the sum. The product sum calculation coefficient is obtained by plotting one cycle of a sine wave and one cycle of a cosine wave at intervals of π/3.

The invention discloses a dynamic vision sensor output event flow noise reduction method, relates to the field of image sensors, and overcomes the defects that an existing conventional noise reductionmethod needs relatively high operational capability, is complex, relatively long in time delay, incapable of adjusting solidification parameters and the like. Meanwhile, anthe algorithm has the problems that embedded transplantation is not facilitated, space information is lost due to incomplete utilization of events in the space field, and the like, and the. The method comprises the following steps: performings statistics and judgment on the number and positions of the events in the space-time neighborhood of the newly arrived event to obtain whether the event is a noise event or not. Compared with an existingthe conventional method, the method disclosed in the invention has the advantages of simple calculation, adjustable parameters and the like. According to the method, future events do not need to participate in calculation and judgment, and delay events are reduced. And the n Newly arrived events are filtered in sequence, data is not processed in a frame form, and time information and resolution are better reserved. By judging the spatial position, flicker noise occurring at high frequency can be eliminated.