120 results about "Event count" patented technology

Determining an end-of-life prediction of a replaceable cartridge may be accomplished by analyzing input parameters independent of the cartridge, in addition to parameters of the cartridge. An event count denoting a consumption event is read from a memory in the replaceable cartridge. A current consumption status of the replaceable cartridge is determined based on an initial load and the event count of the replaceable cartridge. An input parameter is received from an input device regarding a next pending process that involves a pending consumption increment of the replaceable cartridge. A subsequent consumption status of the replaceable cartridge is determined corresponding to the current consumption status altered by the pending consumption increment. The subsequent consumption status is compared to a replacement condition to decide whether a replacement condition is satisfied. An alert indicator is signaled to an operator upon satisfaction of the replacement condition.

Methods for estimating data-dependent jitter (DDJ) from measured samples of a transmitted data signal include a first exemplary step of obtaining a plurality of measurements (e.g., time tags and event counts for selected pulse widths in the data signal). Such measurements may be obtained at predetermined intervals within a transmitted signal or may be obtained at randomly selected intervals, and should yield measurements for each data pulse in a repeating data pattern. An average unit interval value representative of the average bit time of the transmitted signal is determined. Time interval error estimates representative of the timing deviation from each signal edge's measured value relative to its ideal value (determined in part from the calculated average unit interval value) are also determined, as well as a classification for each measured signal edge relative to a corresponding data pulse in the repeating data pattern. DDJ delta lines are then calculated for signal edges of each pulse width in the transmitted data pattern, from which peak-to-peak DDJ values and / or estimates of duty-cycle-distortion (DCD) can be determined.

A system and method for collecting a plurality of metrics during a single run of a computer program. The mechanism of the present invention initializes a plurality of counters to count events associated with metrics of interest. The mechanism of the present invention then counts the occurrence of events associated with metrics of interest during a single execution of a computer program. When a branch has been taken, a trace record is generated for the branch taken, wherein the generated trace record contains a count of events associated with the metrics of interest for the branch taken.

In an embodiment, a digital power estimator (DPE) may be provided that may monitor the processors to estimate the amount of power being consumed. If the estimate exceeds a power threshold, the DPE may throttle one or more of the processors. Additionally, throttling events may be monitored to determine if a change in the operating point is desired. In one embodiment, the DPE throttling events may be counted, and if the counts exceed a count threshold, a change in the operating point to a reduced operation point may be requested. Additionally, if the DPE estimate is below the power threshold (or a second power threshold), a second count of events may be maintained. If the second count exceeds a threshold and the operating point is the reduced operating point, a return to the original operating point may be requested.

A detecting apparatus detects the degree of correlation between first events and second events repeatedly occurring in an observed apparatus includes an acquiring unit that acquires second event count values each indicating the number of second events occurring during each first period between each first event and the first event next thereto. A measuring unit measures an observed number of each second event count value derived from the number of times the second event count value is observed. A calculating unit calculates the degree of correlation between the first events and the second events based on the observed number of each second event count value.

A weighted event counting system and method for processor performance measurements provides low latency and low error performance measurement capability. A weighted performance counter accumulates a performance count according to a plurality of event signals provided from functional units in the processor. Differing weights are applied to the event signals in according to the correlation between each event with processor performance. The weights may be provided from programmable registers, so that the weights can be adjusted under program control. The event signals may be combined to reduce the bit-width of the set of event signal, with mutually-exclusive events merged in single fields of the combinatorial result and events having the same weights merged according to a sub-total. The weights are applied to the combinatorial result and used to update a performance count. The performance count can then be used by power management software or hardware to make adjustments in operating parameters of the processor.

One embodiment of the present invention sets forth a graphics processing system configured to track event counts in a tile-based architecture. The graphics processing system includes a screen-space pipeline and a tiling unit. The screen-space pipeline includes a first unit, a count memory associated with the first unit, and an accumulating memory associated with the first unit. The first unit is configured to detect an event type and increment the count memory. The tiling unit is configured to cause the screen-space pipeline to update an external memory address to reflect a first value stored in the count memory when the first unit completes processing of a first set of primitives. The tiling unit is also configured to cause the screen-space pipeline to update the accumulating memory to reflect a second value stored in the count memory when the first unit completes processing of a second set of primitives.

A graphics processing system configured to track per-tile event counts in a tile-based architecture. A tiling unit in the graphics processing system is configured to cause a screen-space pipeline to load a count value associated with a first cache tile into a count memory and to cause the screen-space pipeline to process a first set of primitives that intersect the first cache tile. The tiling unit is further configured to cause the screen-space pipeline to store a second count value in a report memory location. The tiling unit is also configured to cause the screen-space pipeline to process a second set of primitives that intersect the first cache tile and to cause the screen-space pipeline to store a third count value in the first accumulating memory. Conditional rendering operations may be performed on a per-cache tile basis, based on the per-tile event count.

According to one method of simulation processing, instrumentation code, such as an runtime executive (rtx), receives one or more statements describing an count event and identifying the count event as an outlying count event. While simulating a design utilizing the HDL simulation model, occurrences of the outlying count event are counted to obtain a count event value. Simulation result data obtained from simulating the design is then received and processed. In the processing, the count event value is recorded within a data storage subsystem responsive to a determination of whether or not the count event value of the outlying count event exceeds a previously recorded count event value.