A writing apparatus of a semiconductor memory device includes a pulse generator, a latch unit and an output latch unit. The pulse generator outputs a first pulse every rising edge of a data strobe pulse and a second pulse every falling edge of the data strobe pulse, respectively. The latch unit latches data input every rising edge of the first pulse, latches data input every rising edge of the second pulse and the latched data, respectively, and allocates the latched data to first and second data lines. The output latch unit latches data, which are firstly allocated to the first and second data lines, in response to a first control signal, and latches data, which are secondly allocated to the first and second data lines, in response to a second control signal.