The invention relates to a
wafer level fan-out
chip packaging method, comprising the following technological processes: a stripping foil and a film
dielectric layer I are sequentially covered on the surface of the
wafer of a carrier, a photoetching pattern opening I is formed on the film
dielectric layer I; a
metal electrode and a re-wiring
metal routing wire which are connected with a base plate end are arranged on the photoetching pattern opening and the surface thereof, a film
dielectric layer II is covered on the surface of the
metal electrode, the surface of the re-wiring metal routing wire, and the surface of the film
dielectric layer I which are connected with the base plate end, and a photoetching pattern opening II is formed on the film
dielectric layer II; a metal
electrode connected with a
chip end is arranged on the photoetching pattern opening II, after a
chip is arranged on the metal electrode connected with the chip end in an inverting way, the injection molding of packaging material and solidification are carried out, so as to form a packaging body with plastic-packaging material; the
wafer of the carrier and the stripping foil are separated from the packaging body with plastic-packaging material, so as to form a plastic-packaging wafer; a
welding sphere back returns to form a
welding ball
salient point;
cutting is carried out by uniwafers for forming the final structure of the fan-out chip. The method has low cost and a carrying function, and can well solve the problem that the chip is shifted in the technological process.