86results about How to "Reduce electrical impedance" patented technology

The invention provides a convenient and non-invasive means to prepare cells, tissues, and organs for electrical transmission and reception. In an embodiment of the invention, a control method comprises the use of at least one skin electrode, as a reference electrode, and an electrical sensor to measure periodically or continuously the skin's electrical conductance at the site of preparation. The dynamic change in the conductance through the skin is measured while the ultrasound is applied. Signal processing is performed on the measurement and the level of skin impedance change is controlled by performing a mathematical analysis and using the results of such analysis to control the application of ultrasonic energy. A desired level of skin impedance can be set at a predetermined value or based on a chosen level of skin integrity, subject's sensation of discomfort, or duration of the ultrasound application.

A process for fabricating an integrated circuit package includes: selectively etching a first side of a substrate thereby providing etched regions of the substrate to partially define at least a plurality of contact pads; adding a dielectric material to the etched regions of the substrate; selectively etching a second side of the substrate to further define at least the plurality of contact pads and thereby provide a package base of at least the contact pads and the dielectric; mounting a semiconductor die to the package base and connecting the semiconductor die to the contact pads; fixing a lid to the package base to cover the semiconductor die in a cavity between the lid and the package base; and singulating to provide the integrated circuit package.

Bioadhesive Compositions which comprise a hydrophobic polymer wherein the concentration of the polymer at the surface of the adhesive is greater than its concentration in the bulk of the adhesive are described; and biomedical electrodes, fixation products and wound dressings containing them.

The present invention relates to inter-chip electrostatic discharge (ESD) protection structures for high speed, and high frequency devices that contain one or more direct, inter-chip signal transmission paths. Specifically, the present invention relates to a structure that contains: (1) a first chip including a first circuit, (2) a second chip including a second circuit, (3) an intermediate insulator layer located between the first and second chips, wherein the first and second circuits form a signal transmission path for transmitting signals through the intermediate insulator layer. An electrostatic discharge (ESD) protection path is provided in the structure between the first and the second chip through the intermediate insulator layer, to protect the signal transmission path from ESD damages.

Methods for preparing a multi-layer acoustic transducer with reduced total electrical impedance. The methods are based on the stacking of individual piezoelectric layers with metallized surfaces to form a plate in which the metal layers are electrically connected to form interdigitated electrodes. The total electrical impedance of a multi-layer stack comprised of piezoelectric layers connected in this manner is inversely related to the square of the number of layers in the stack. This provides for better matching of the acoustic stack impedance to that of the electrical cable and improved acoustic element sensitivity.

A leadless plastic chip carrier is fabricated by selectively etching a leadframe strip to reduce a thickness of the strip at a portion thereof. Selectively masking the surface of the leadframe strip using a mask, follows selectively etching, to provide exposed areas of the surface at the portion and contact pad areas on leadframe the strip. At least one layer of metal is deposited on the exposed areas to define a die attach pad on the portion of the leadframe strip with reduced thickness and to define contact pads on the surface of the strip. At least one semiconductor die is mounted to the die attach pad, followed by wire bonding the at least one semiconductor die to ones of the contact pads. The at least one semiconductor die, the wire bonds, and the contact pads are covered with an overmold material and the leadframe strip is etched to thereby remove the leadframe strip. The leadless plastic chip carrier is singulated from the leadframe strip.

A method for manufacturing a multi-layer acoustic transducer with reduced total electrical impedance. The method is based on the bonding of two piezoelectric ceramic layers with confronting metallized surfaces to a thin electrical conductor, then electrically connecting the top and bottom surfaces to form a wrap-around electrode while a center conductor forms a second electrode. The total electrical impedance of a two-layer ceramic stack comprised of piezoelectric layers connected in this manner is one-fourth that of a solid ceramic element of the same size. This provides for better matching of the acoustic stack impedance to that of the electrical cable, increased penetration depth for imaging within the body, and improved acoustic element sensitivity.

A magnetic write head and method for bulk fabrication of the same are provided. A trench is formed in a nonmagnetic substrate. A first magnetically permeable layer is deposited in the trench of the substrate. An optional first insulating layer is deposited in the trench. A conducting circuit is defined in the trench. The conducting circuit creates the magnetic flux. An optional second insulating layer is deposited in the trench. Writer gaps are patterned and then a second magnetic layer is added over the second insulating layer. The substrate is divided to form individual write heads.

A magnetic write head and method for bulk fabrication of the same are provided. A trench is formed in a nonmagnetic substrate. A first magnetically permeable layer is deposited in the trench of the substrate. An optional first insulating layer is deposited in the trench. A conducting circuit is defined in the trench. The conducting circuit creates the magnetic flux. An optional second insulating layer is deposited in the trench. Writer gaps are patterned and then a second magnetic layer is added over the second insulating layer. The substrate is divided to form individual write heads.

Disclosed is a carbonaceous nanocomposite, comprising: a substrate; a graphene sheet formed on a top surface of the substrate in parallel with the substrate; and a carbonaceous nano material provided at another surface of the graphene sheet, the material having an aspect ratio of 2 to 75,000 to make a predetermined angle with the graphene. The carbonaceous nanocomposite according to the present invention has excellent adhesion to the substrate and can be attached to the substrate without undergoing a pasting process. As a two-directional current flow is generated, the electrical resistance of the graphene and carbon nanotube is considerably reduced.; In addition, the carbon nanotube is configured to have a high current density through the graphene and a high specific surface area, thereby accelerating a redox reaction, and the excellent radiating property of the graphene sheet enables a speedy transfer of heat generated in the carbon nanotube to outside, thereby avoiding a degradation phenomenon of the carbon nanotube. Thus, when employed as an electrode for a battery or a field emission display, the present invention nanocomposite provides a higher current density and an extended life compared with the prior art.