33results about How to "Maximize capacitance" patented technology

A memory device includes a plurality of memory cells arranged in series in the semiconductor body, such as a NAND string, having a plurality of word lines. A selected memory cell is programmed by hot carrier injection using a boosted channel potential to establish the heating field. Boosted channel hot carrier injection can be based on blocking flow of carriers between a first side of a selected cell and a second side of the selected cell in the NAND string, boosting by capacitive coupling the first semiconductor body region to a boosted voltage level, biasing the second semiconductor body region to a reference voltage level, applying a program potential greater than a hot carrier injection barrier level to the selected cell and enabling flow of carriers from the second semiconductor body region to the selected cell to cause generation of hot carriers.

A capacitive micro-machined ultrasonic transducer (CMUT) array includes an improved elementary aperture for imaging operations. The transducer can be of a linear, curved linear, annular, matrix or even single surface configuration. The elementary apertures thereof are formed by a specific arrangement of capacitive micromachined membranes (CMM) so as to exhibit ideal acoustical and electrical behavior when operated with imaging systems. The CMM arrangements can be either conventional where the element transducers of the array are uniformly shaped by predefined CMMs in a manner such as to exhibit acoustic behavior similar to a piezoelectric transducer, or can be more sophisticated, wherein each element transducer is formed by a specific combination of different CMMs (i.e., of a different size and / or shape) so as to provide the transducer with built-in acoustic apodization that can be implemented in the azimuth and / or elevation dimension of the device.

This invention relates to a method for improving the chemical and electrical performance characteristics of a dielectric material especially one with high dielectric constant. The method comprises the steps of first obtaining a high dielectric constant material, the material having a degraded upper surface reduced dielectric constant and then modifying the surface chemistry of said upper surface by reacting said upper surface with a reactant. The reaction enables removal of the degraded layer. In a variant of the method, the gas reactant preferentially reacting with upper surface as compared to the bulk.

Electrical connectors having improved impedance characteristics are disclosed. Such an electrical connector may include a first electrically conductive contact, and a second electrically conductive contact disposed adjacent to the first contact along a first direction. A mating end of the second contact may be offset in a second direction relative to a mating end of the first contact. Offsetting of contacts within columns of contacts provides capability for adjusting impedance and capacitance characteristics of a connector assembly.

A dielectric ceramic composition for low-temperature sintering and hot insulation resistance (hot IR) is capable of carrying out low-temperature sintering, improving a hot IR characteristic, and meeting X5R characteristics, and a multilayer ceramic capacitor makes use of the dielectric ceramic composition. The dielectric ceramic composition includes a main component BaTiO3, and sub-components, based on 100 moles of the main component, MgO of 0.5 moles to 2.0 moles, Re2O3 of 0.3 moles to 2.0 moles, MnO of 0.05 moles to 0.5 moles, V2O5 of 0.01 moles to 0.5 moles, BaO of 0.3 moles to 2.0 moles, SiO2 of 0.1 moles to 2.0 moles, and borosilicate glass of 0.5 moles to 3.0 moles, where Re includes at least one selected from the group consisting of Y, Ho and Dy.

The piezoelectric thin-film tuning fork resonator (40) comprises an integral tuning fork made out of a quartz crystal. The tuning fork comprises a base (48) and a pair of parallel vibrating arms (44, 46) extending from the base. Each of the vibrating arms carries:first and second electrodes (62, 64) provided on at least one main surface of the arm, said first and second electrodes being formed respectively on an inner portion and on an outer portion of said one main surface, in such a way as to be spaced apart,first and second piezoelectric thin films (66, 68) formed over the first and second electrodes respectively,third and fourth electrodes (70, 72) formed over the first and second piezoelectric thin films respectively.

An electric machine including multiple windings, a switch circuit connected to each of the windings, a positive bus bar, and a negative bus bar. The switch circuits are in communication with the windings to selectively energize each of the windings. The positive bus bar is a conductive plate connected to the switch circuits and the negative bus bar is a conductive plate positioned substantially parallel to the positive bus bar and connected electrically to the switch circuits.

An integrated circuit structure includes a digit line and an electrode adapted to be part of a storage cell capacitor and includes a barrier layer interposed between a conductive plug and an oxidation resistant layer. An insulative layer protects sidewalls of the barrier layer during deposition and anneal of a dielectric layer. The method includes forming the conductive plug recessed in an insulative layer. The barrier layer is formed in the recess and the top layer. An oxidation resistant conductive layer and a further oxide layer are formed in the recess. The conductive layer is planarized to expose the oxide or oxide / nitride layer. The oxide layers are then etched to expose the top surface and vertical portions of the conductive layer. A dielectric layer is formed to overlie the storage node electrode. A cell plate electrode is fabricated to overlie the dielectric layer.

A capacitive micro-machined ultrasonic transducer (CMUT) array includes an improved elementary aperture for imaging operations. The transducer can be of a linear, curved linear, annular, matrix or even single surface configuration. The elementary apertures thereof are formed by a specific arrangement of capacitive micromachined membranes (CMM) so as to exhibit ideal acoustical and electrical behavior when operated with imaging systems. The CMM arrangements can be either conventional where the element transducers of the array are uniformly shaped by predefined CMMs in a manner such as to exhibit acoustic behavior similar to a piezoelectric transducer, or can be more sophisticated, wherein each element transducer is formed by a specific combination of different CMMs (i.e., of a different size and / or shape) so as to provide the transducer with built-in acoustic apodization that can be implemented in the azimuth and / or elevation dimension of the device.

Electrical connectors having improved impedance characteristics are disclosed. Such an electrical connector may include a first electrically conductive contact, and a second electrically conductive contact disposed adjacent to the first contact along a first direction. A mating end of the second contact may be offset in a second direction relative to a mating end of the first contact. Offsetting of contacts within columns of contacts provides capability for adjusting impedance and capacitance characteristics of a connector assembly.

Provided is a solid electrolytic capacitor including a capacitor element with a positive polarity; an anode wire inserted and connected to a lower portion of the capacitor element; a cathode extraction layer formed on the capacitor element; an anode lead frame provided on one side of the lower surface of the capacitor element so as to be electrically insulated from the cathode extraction layer, the anode lead frame having an insertion portion into which a projecting lower portion of the anode wire is inserted; a cathode lead frame provided on the other side of the lower surface of the capacitor element so as to be electrically connected to the cathode extraction layer; a molding portion formed to surround the capacitor element and exposing the lower end surface of the anode wire, the lower surface of the anode lead frame, and the lower surface of the cathode lead frame; an anode lead terminal provided on the molding portion so as to be electrically connected to the lower end surface of the anode wire and the lower surface of the anode lead frame; and a cathode lead terminal provided on the molding portion so as to be electrically connected to the lower surface of the cathode lead frame.

A dielectric ceramic composition for low-temperature sintering and hot insulation resistance (hot IR) is capable of carrying out low-temperature sintering, improving a hot IR characteristic, and meeting X5R characteristics, and a multilayer ceramic capacitor makes use of the dielectric ceramic composition. The dielectric ceramic composition includes a main component BaTiO3, and sub-components, based on 100 moles of the main component, MgO of 0.5 moles to 2.0 moles, Re2O3 of 0.3 moles to 2.0 moles, MnO of 0.05 moles to 0.5 moles, V2O5 of 0.01 moles to 0.5 moles, BaO of 0.3 moles to 2.0 moles, SiO2 of 0.1 moles to 2.0 moles, and borosilicate glass of 0.5 moles to 3.0 moles, where Re includes at least one selected from the group consisting of Y, Ho and Dy.

A capacitor sensor array (or grid) over a wireless power transmission coil can include a first set of lines; a second set of lines intersecting the first set of lines; a first multiplexer coupled to provide a charge (e.g. in the form of a DC voltage) from a voltage source to the first set of lines and provide first signals to detect voltages on each line; and a second multiplexer coupled to provide a charge from the voltage source to the second set of lines and provide second signals to detect voltages on each line, wherein an object positioned with respect to the first set of lines and the second set of lines is located. According to some embodiments, a wireless power receive coil and a rectifier circuit can be used in forming a capacitor sensor, to sense the capacitance between the receive and transmit coils for better alignment between the two coils. Other embodiments are also provided.

A storage cell capacitor and a method for forming the storage cell capacitor having a storage node electrode including a barrier layer interposed between a conductive plug and an oxidation resistant layer. A layer of titanium silicide is fabricated to lie between the conductive plug and the oxidation resistant layer. An insulative layer protects the sidewalls of the barrier layer during the deposition and anneal of a dielectric layer having a high dielectric constant.

This invention relates to a method for improving the chemical and electrical performance characteristics of a high dielectric constant material. The method comprises the steps of first obtaining a barium containing high dielectric constant material, the material having an upper surface and then modifying the surface chemistry of said upper surface by interacting said upper surface with a gas reactant in a closed environment. In a variant of the method, the gas reactant preferentially reacting with upper surface as compared to the bulk.

A method of producing an electrode for use in the manufacture of electrolytic capacitors for implantable cardioverter defibrillators comprises first growing a hydrate layer and / or formed oxide layers of the foil, applying a laser beam to portions of the foil to ablate the aluminum oxide foil surface before etching in order to induce etching in the specific areas, and then, etching the foil. The laser marks the oxide layer in a pulsed spot pattern through the hydrate layer and / or formed oxide layer leaving a dimpled nascent aluminum surface. The oxide layer left behind is a mask and the fresh aluminum areas are the high etching activation sites. After marking the aluminum oxide foil surface, the foil may be electrochemically etched in an electrolyte containing chloride and / or various oxidative species.

The present invention relates to a capacitor. The capacitor includes a substrate; a dielectric layer formed on the substrate; and an electrode layer comprising a first electrode layer and a second electrode layer formed on the dielectric layer, wherein the first electrode layer and the second electrode layer are separated from each other, and at least a portion of the first electrode layer and at least a portion of the second electrode layer are disposed on a same surface. With this configuration, applying the electricity becomes easy, and since the first and the second electrode layers function as the electrodes being charged with different polarity electrical charges respectively, manufacturing thereof becomes easy, and the structure thereof is simple.

A capacitor circuit having improved reliability includes at least first and second capacitors, a first terminal of the first capacitor connecting to a first source providing a first voltage, a first terminal of the second capacitor connecting to a second source providing a second voltage, the first voltage being greater than the second voltage. The capacitor further includes a voltage comparator having a first input for receiving a voltage representative of the first voltage, a second input for receiving a third voltage provided by a third source, and an output for generating a control signal. The control signal is a function of a difference between the voltage representative of the first voltage and the third voltage. A switch is connected to second terminals of the first and second capacitors. The switch is selectively operable in one of at least a first mode and a second mode in response to the control signal, wherein in the first mode the switch is operative to connect the first and second capacitors together in parallel, and in the second mode the switch is operative to connect the first and second capacitors together in series. The first mode is indicative of the voltage representative of the first voltage being less than or about equal to the third voltage, and the second mode is indicative of the voltage representative of the first voltage being greater than the third voltage.

The invention describes a capacitive power transfer arrangement (1) for transferring power between a first electrical device (10) and a physically independent second electrical device (20), which power transfer arrangement (1) comprises a number of coupled capacitors (C1, C2), and wherein a coupled capacitor (C1, C2) comprises a first electrode (C110, C210), which first electrode (C110, C210) comprises a heatsink (H1, H2) thermally coupled to a heat dissipating component (Q, 14) of a power supply (12) of the first electrical device (10); a second electrode (C120, C220) realized in the second electrical device (20); and a dielectric layer (D) formed by a housing (16, 26) of at least one of the electrical devices (10, 20). The invention further describes a method of performing capacitive power transfer from a first electrical device (10) to a physically independent second electrical device (20); a driver (11) of an electrical device (10); and n electrical device (10) comprising such a driver (11).

Provided is a solid electrolytic capacitor including a capacitor element with a positive polarity; an anode wire of which one side is inserted into the capacitor element and the other side projects outward from the capacitor element; a cathode extraction layer formed on the capacitor element; a plurality of conductive bumps formed on the cathode extraction layer; an anode lead frame fixed to the side of the capacitor element, where the anode wire projects outward, and having an insertion portion into which the projecting end of the anode wire is inserted; a molding portion formed to surround the capacitor element and exposing the projecting end of the anode wire, the outer surface of the anode lead frame, and ends of the conductive bumps; an anode lead terminal provided on the molding portion so as to be electrically connected to the exposed end of the anode wire and the anode lead frame; and a cathode lead terminal provided on the molding portion so as to be electrically connected to the exposed ends of the conductive bumps.

A capacitor circuit having improved reliability includes at least first and second capacitors, a first terminal of the first capacitor connecting to a first source providing a first voltage, a first terminal of the second capacitor connecting to a second source providing a second voltage, the first voltage being greater than the second voltage. The capacitor further includes a voltage comparator having a first input for receiving a voltage representative of the first voltage, a second input for receiving a third voltage provided by a third source, and an output for generating a control signal. The control signal is a function of a difference between the voltage representative of the first voltage and the third voltage. A switch is connected to second terminals of the first and second capacitors. The switch is selectively operable in one of at least a first mode and a second mode in response to the control signal, wherein in the first mode the switch is operative to connect the first and second capacitors together in parallel, and in the second mode the switch is operative to connect the first and second capacitors together in series. The first mode is indicative of the voltage representative of the first voltage being less than or about equal to the third voltage, and the second mode is indicative of the voltage representative of the first voltage being greater than the third voltage.

A capacitor sensor array (or grid) over a wireless power transmission coil can include a first set of lines; a second set of lines intersecting the first set of lines; a first multiplexer coupled to provide a charge (e.g. in the form of a DC voltage) from a voltage source to the first set of lines and provide first signals to detect voltages on each line; and a second multiplexer coupled to provide a charge from the voltage source to the second set of lines and provide second signals to detect voltages on each line, wherein an object positioned with respect to the first set of lines and the second set of lines is located. According to some embodiments, a wireless power receive coil and a rectifier circuit can be used in forming a capacitor sensor, to sense the capacitance between the receive and transmit coils for better alignment between the two coils. Other embodiments are also provided.

The present invention relates to a capacitor. The capacitor includes a substrate; a dielectric layer formed on the substrate; and an electrode layer comprising a first electrode layer and a second electrode layer formed on the dielectric layer, wherein the first electrode layer and the second electrode layer are separated from each other, and at least a portion of the first electrode layer and at least a portion of the second electrode layer are disposed on a same surface. With this configuration, applying the electricity becomes easy, and since the first and the second electrode layers function as the electrodes being charged with different polarity electrical charges respectively, manufacturing thereof becomes easy, and the structure thereof is simple.