The invention discloses an
SOI LDMOS device with an extending gate structure, and belongs to the technical field of
semiconductor power devices. According to the
SOI LDMOS device, the extending gate structure extending from a
polysilicon gate to a drain
electrode is introduced into the surface of a drift region of a conventional
SOI LDMOS device. A PN junction which is reversely biased when the device is in the on state is introduced into the extending gate structure to reduce a leakage current. The extending gate structure is characterized in that on one hand, when the device is in the on state, a majority carrier accumulation layer is sensed on the portion, close to extending gate media, of the surface of the drift region, an ultralow resistance channel is provided for the on-state current, the specific
on resistance of the device is accordingly and remarkably reduced, and the specific
on resistance does not depend on the
doping concentration of the drift region; on the other hand, when the device is in the off state, distribution of an
electric field in the drift region is adjusted through the extending gate structure, and the
voltage resistance of the device is accordingly improved. In addition, the vast majority of the on-state current flows through the low-resistance channel of the charge accumulation layer, temperature distribution of the SOI
LDMOS device is accordingly even, and the SOI
LDMOS device is stable.