68results about How to "Less memory space" patented technology

A method of efficiently recovering a database that can be applied to a mobile communication terminal employing a flash memory as a storage medium is provided. In the flash memory, a database (DB) storage area and a DB recovery area are separately allocated. Images of pages in the DB storage area that are objects to be changed are sequentially read and stored in a memory buffer, and the original images of the pages before change are assigned sequential serial numbers and backed up in the DB recovery area. Then, the images of the pages in the memory buffer are changed according to a transaction. This series of jobs is performed with respect to all pages that are the objects of change. Then, each page in the DB storage area that is the object of the change is updated with a corresponding changed page in the memory buffer. If the mobile communication terminal is abnormally terminated without successfully performing this update, when the terminal is booted again, it is confirmed whether or not the serial number of the last page in the DB recovery area matches the total number of pages stored in the DB recovery area. If the serial number matches the total number, with the original image of the page before modification stored in the DB recovery area, the corresponding page in the DB storage area is recovered.

A method for performing a static wear leveling on a flash memory is disclosed. Accordingly, a static wear leveling unit is disposed with a block reclamation unit of either a flash translation layer or a native file system in the flash memory, and utilizes less memory space to trace a distribution status of block leveling cycles of each physical block of the flash memory. Based on the distribution record of the block leveling cycles, the number of the leveling cycles less than a premeditated threshold would be found while the system idles. Then the static wear leveling unit requests the block reclamation unit to level the found blocks. Before leveling the found block, the rarely updated data is compelled to move from one block to another block which is leveled frequently, whereby accurate wear leveling cycles for the blocks can be averaged extremely.

A method for accessing a flash memory module is provided. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least a first super block and at least a second super block of the flash memory chips; and allocating the second super block to store a plurality of temporary parities generated when data is written into the first super block.

A method is provided for decoding data packets in wireless communication schemes that use a Hybrid Automatic Repeat Request technique, and a receiver for wireless communication that performs such a method. The HARQ memory incorporated in a receiver for wireless communication is minimized to a size which only reserves memory for an average number of erroneous sub-packets. Following decoding, an error check is performed on a per sub-packet basis, and only the softbits of those sub-packets for which decoding errors have been detected are stored in the HARQ memory. Correctly decoded sub-packets are stored in a separate memory. This significantly decreases the size of the HARQ memory required at the receiver which is beneficial in terms of both silicon area and power consumption.

Methods of providing component-based software in a plurality of binary images, linking the component-based software, and updating the component-based software, and an information storage medium having software recorded thereon are provided. The information storage medium having software recorded thereon includes at least one software component, a symbol table in which address information of symbols used by the software component is recorded, and memory map information recording memory address information indicating where the software component and the symbol table are loaded.

A method is disclosed that employs a hierarchical path database generator for accessing internal signal or port names in a design hierarchy of an integrated circuit design. The method comprises the steps of inputting design files into the hierarchical path database generator; and said hierarchical path database generator determining ports and signals in said design files, and storing the names of said ports and signals in a hierarchical database in a logical hierarchical order. The method comprises the further steps of providing a testcase to verify a defined aspect of the integrated circuit design; parsing the testcase to identify all signal and port names therein; and for each of the signal and port names identified in the testcase, inputting said each name into the hierarchical path database generator, and obtaining from that generator a hierarchical path associated with said each signal and port name.