The invention relates to the field of computer components, in particular to a six-level
assembly line processor based on an RISC-V
instruction set, which comprises a six-level
assembly line, a first register, a
data memory and an
instruction memory, and is characterized in that an instruction fetching module, a decoding module, a distribution module, a transmitting module, an execution module and a write-back module of the six-level
assembly line are connected in sequence; the
data memory is connected with the execution module and the write-back module, the first register is connected with the distribution module and the write-back module, and the
instruction memory is connected with the instruction fetching module. The characteristic of out-of-order execution of double-instruction decoding emission is achieved, and a
reference model is provided for
superscalar parallel design of the RISC-V processor. And a Gshare
branch prediction circuit is provided, so that the
branch prediction success rate is improved. The register is renamed, so that
assembly line cavitation caused by reading after writing and writing after writing is remarkably reduced. And a complete
branch prediction failure repair circuit is provided, so that the
time loss caused by branch prediction failure is reduced.