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37results about How to "High frequency performance" patented technology

Gallium nitride high electron mobility transistor having inner field-plate for high power applications

A gallium nitride high electron mobility transistor, in which an inner field-plate is disposed between the gate and drain of the high electron mobility transistor, so that an electric field is distributed between gate and drain regions to reduce a peak value and to reduce gate leakage current while maintaining high frequency performance, thus obtaining a high breakdown voltage, reducing the capacitance between the gate and the drain attributable to a shielding effect, and improving linearity and high power and high frequency characteristics through variation in the input voltage of the inner field-plate. The gallium-nitride high electron mobility transistor includes a gallium nitride buffer layer. An aluminum gallium-nitride barrier layer is formed on the buffer layer. A source electrode is placed on the barrier layer. A drain electrode is placed on the barrier layer to be spaced apart from the source electrode. A gate electrode is placed on a top of the barrier layer to be spaced apart from the source electrode and the drain electrode. A dielectric layer is deposited on the top of the barrier layer. An electric field electrode is formed on the dielectric layer located on the gate electrode. An inner field-plate is formed in the dielectric layer to be spaced apart from the gate electrode and the drain electrode.
Owner:KOREA ADVANCED INST OF SCI & TECH

Compliant wafer level probe assembly

A probe assembly that acts as a temporary interconnect between terminals on a circuit member and a test station. The probe assembly can include a base layer of a dielectric material printed onto a surface of a fixture. The surface of the fixture can have a plurality of cavities. A plurality of discrete contact members can be formed in the plurality of cavities in the fixture and coupled to the base layer. A plurality of conductive traces can be printed onto an exposed surface of the base layer and electrically coupled with proximal ends of one or more of the discrete contact members. A compliant layer can be deposited over the conductive traces and the proximal ends of the contact members. A protective layer can be deposited on the compliant layer such that when the probe assembly is removed from the fixture the distal ends of the contact members contact terminals on the circuit member and the conductive traces electrically couple the circuit member to a test station. Electrical devices on the probe assembly can communicate with the test station to provide adaptive testing.
Owner:HSIO TECH

Area array semiconductor device package interconnect structure with optional package-to-package or flexible circuit to package connection

An area array integrated circuit (IC) package for an IC device. The IC package includes a first substrate with conductive traces electrically coupled to the IC device. An interconnect assembly having a first surface is mechanically coupled to the first substrate. The interconnect assembly includes a plurality of contact members electrically coupled to the conductive traces on the first substrate. A second substrate is mechanically coupled to a second surface of the interconnect assembly so that the first substrate, the interconnect assembly, and the second substrate substantially surround the IC device. The second substrate includes conductive traces that are electrically coupled to the contact members in the interconnect assembly.
Owner:HSIO TECH

Ferroelectric dielectric for integrated circuit applications at microwave frequencies

A ferroelectric dielectric for microwave applications is provided comprising a polycrystalline perovskite phase of lead zirconate titanate dielectric material. Small grain size material is provided by a low temperature process, by a rapid thermal annealing process. A layer of amorphous ferroelectric precursor material is deposited and annealed in an oxygen containing atmosphere in the presence of water vapor, preferably with the addition of a few percent of ozone, and at a temperature of less than 500.degree. C. Advantageously, the method provides for formation of a ferroelectric material comprising lead zirconate titanate with a grain size less than 20 nm, with low film stress, high dielectric constant and low leakage current, which has excellent ferroelectric characteristics up to 10 GHz. This material has applications for capacitors, as filters, decoupling, coupling, and bypass elements and also for high frequency surface acoustic wave devices.
Owner:NORTEL NETWORKS LTD

Semiconductor device, method for manufacturing same and thin plate interconnect line member

ActiveUS7301228B2Improve process controllabilityImprove adhesivenessSemiconductor/solid-state device detailsSolid-state devicesDielectric lossEngineering
The present invention provides a low-profile and light-weight semiconductor device having improved product reliability and higher frequency performance. A multi-layer interconnect line structure is disposed just under circuit devices 410a and 410b. An Interlayer insulating film 405 that composes a part of the multi-layer interconnect line structure is formed of a material having a relative dielectric constant within a range from 1.0 to 3.7, and a dielectric loss tangent within a range from 0.0001 to 0.02.
Owner:SEMICON COMPONENTS IND LLC

Electrical connector

An electrical connector includes an insulating assembly, terminals, an inner shielding assembly and an outer shielding assembly. The insulating assembly has a tongue board at a front. The terminals are insert molded the insulating assembly and are divided into an upper row and a lower row with contacts portions located at a top side and a bottom side of the tongue board. Outmost two of the upper row of terminals and outmost two of the lower row of terminals are grounding terminals, outsides of rears of the contact portions of the grounding terminals form touch portions. The inner shielding assembly includes an upper shielding piece and a lower shielding piece located to a rear of the tongue board. The outer shielding assembly includes a shielding sleeve sleeving and spaced from the tongue board, the shielding sleeve contacts with at least one of the upper shielding piece and the lower shielding piece.
Owner:CHENG UEI PRECISION IND CO LTD

Method for calibrating a digital-to-analog converter and a digital-to-analog converter

The invention describes a method for digitally calibrating a segmented current-steering D / A-converter. One embodiment of the present invention is a 14-bit DAC, where 6 MSB's are converted with two unweighted current source array. Further, in this invention a new method for organising the switching order based on the analysed data of mismatch of the current sources is presented. A programmable mapping device is used instead of the fixed thermometer decoding before the switch array. Using this programmable mapping device the switching order of the current switches can be selected optimally so that the error in the resulting analog signal is minimised. The switching order is programmed to the mapping device on the basis of the calibration method according to the present invention. The inventive amendment is aimed at processing errors which cause poor matching inside the component itself. This amendment is done by rearranging unweighted unity current switches into a more optimum order.
Owner:VIVO MOBILE COMM CO LTD

Cordless charging apparatus

InactiveUS20140017998A1Minimizing electromagnetic interferenceProcess stabilityNear-field transmissionBatteries circuit arrangementsResonatorEngineering
A cordless charging apparatus is provided. The cordless charging apparatus includes a cordless power reception resonator including a feeding connector for electric feeding, and a ground connector for grounding. The ground connector is spaced apart from a connection terminal connecting the cordless power reception resonator to a circuit.
Owner:SAMSUNG ELECTRONICS CO LTD
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