48results about How to "Cost-effectively formed" patented technology

A high performance TMR sensor is fabricated by employing a composite inner pinned (AP1) layer in an AP2 / Ru / AP1 pinned layer configuration. In one embodiment, there is a 10 to 80 Angstrom thick lower CoFeB or CoFeB alloy layer on the Ru coupling layer, a and 5 to 50 Angstrom thick Fe or Fe alloy layer on the CoFeB or CoFeB alloy, and a 5 to 30 Angstrom thick Co or Co rich alloy layer formed on the Fe or Fe alloy. A MR ratio of about 48% with a RA of <2 ohm-um2 is achieved when a CoFe AP2 layer, MgO (NOX) tunnel barrier, and CoFe / NiFe free layer are used in the TMR stack. Improved RA uniformity and less head noise are observed. Optionally, a CoFe layer may be inserted between the coupling layer and CoFeB or CoFeB alloy layer to improve pinning strength and enhance crystallization.

A microphone sensing element and a method for making the same are disclosed. The sensing element has a diaphragm and an attached electrical lead-out arm preferably made of polysilicon that are separated by an air gap from an underlying backplate region created on a conductive silicon substrate. The backplate region has acoustic holes created by removing an oxide filling in a continuous trench that surrounds hole edges and by removing oxide to form the air gap. The diaphragm is softly constrained along its edge by an elastic element that connects to a surrounding rigid polysilicon layer. The elastic element is typically a polymer such as parylene having a Young's modulus substantially less than that of the diaphragm. First and second electrodes are connected to the diaphragm through the lead-out arm and to the substrate through polysilicon via fillings, respectively, and thereby establish a variable capacitor circuit for acoustic sensing.

A high performance TMR sensor is fabricated by incorporating a tunnel barrier having a Mg / MgO / Mg configuration. The 4 to 14 Angstroms thick lower Mg layer and 2 to 8 Angstroms thick upper Mg layer are deposited by a DC sputtering method while the MgO layer is formed by a NOX process involving oxygen pressure from 0.1 mTorr to 1 Torr for 15 to 300 seconds. NOX time and pressure may be varied to achieve a MR ratio of at least 34% and a RA value of 2.1 ohm-um2. The NOX process provides a more uniform MgO layer than sputtering methods. The second Mg layer is employed to prevent oxidation of an adjacent ferromagnetic layer. In a bottom spin valve configuration, a Ta / Ru seed layer, IrMn AFM layer, CoFe / Ru / CoFeB pinned layer, Mg / MgO / Mg barrier, CoFe / NiFe free layer, and a cap layer are sequentially formed on a bottom shield in a read head.

An illuminated gauge for a vehicle instrument panel includes a single LCD having at least a first display configuration and a second display configuration different from the first display configuration. A pointer is selectively actuatable to operate within one of the first and the second display configurations. A selector is used to switch between the first and second display configurations.

A waveguide interface for a waveguide having a split ring with a first half and a second half joined by a web portion. The split ring first half and second half having an inner surface configured to mate with an exterior of the waveguide, the first half and the second half foldable towards each other and around the exterior of the waveguide, along the web portion. An overbody with a bore is dimensioned to receive the waveguide therethrough; the bore having a shoulder at an interface end dimensioned to receive the split ring.

A semiconductor structure suitable for micro-transfer printing includes a semiconductor substrate and a patterned insulation layer disposed on or over the semiconductor substrate. The insulation layer pattern forms one or more etch vias in contact with the semiconductor substrate. Each etch via is exposed. A semiconductor device is disposed on the patterned insulation layer and is surrounded by an isolation material in one or more isolation vias that are adjacent to the etch via. The etch via can be at least partially filled with a semiconductor material that is etchable with a common etchant as the semiconductor substrate. Alternatively, the etch via is empty and the semiconductor substrate is patterned to form a gap that separates at least a part of the semiconductor device from the semiconductor substrate and forms a tether physically connecting the semiconductor device to an anchor portion of the semiconductor substrate or the patterned insulation layer.