54results about How to "Avoid simultaneous conduction" patented technology

A DC converter comprises a half bridge supply circuit and one or more flyback or forward converter output circuits, and optionally also an LLC converter whose control can determine a common variable switching frequency. The half bridge supply circuit produces a 50% duty output alternating between two input voltages, such as zero and a voltage Vin. In each flyback or forward converter output circuit, a switch connects a transformer primary to the half bridge supply circuit output in a PWM controlled manner to regulate a respective flyback or forward converter DC output which is produced by the converter output circuit, with a duty ratio less than 50% whereby switching losses are reduced. Soft switching is further facilitated by the half bridge supply circuit having two transistors controlled in a complementary manner.

The invention discloses a motor drive circuit with dead band time delay. The motor drive circuit comprises an H-bridge circuit connected with a motor. The H-bridge circuit is controlled by a photoelectric isolating circuit, a dead band time delay control circuit and a half-bridge drive control circuit and controls the steering of the motor through adjusting breakover and the check time order of an MOS tube. A pair of complementary input signals are output through a double-path photoelectric coupler, and two paths of signals enter the dead band time delay control circuit. Control signals complementary with two alternative denial gate output paths are in concatenation through two paths. Signals output by the dead band time delay control circuit are respectively input to two symmetric units in the half-bridge drive control circuit. The dead band delay control circuit controls the time of a dead band, and simultaneous breakover of two MOS tubes of the same arm is prevented. Dead band time can be adjusted flexibly. The photoelectric isolating circuit increases anti-interference capacity, and reduces interference of H-bridge control signals to a front-grade circuit when an H-bridge outputs large currents in an instant state or a motor is started. The motor drive circuit can work with power supplied by a single power supply.

A switching power supply unit of the present invention includes a timing generating circuit (121) which receives a first control signal formed by a rectifier-transistor driving circuit (104), forms a second control signal based on the first control signal, and supplies the second control signal to a control electrode of the rectifier transistor (113). The first control signal is synchronized with the switching operation of a half-bridge circuit (102), and the second control signal exceeds a threshold voltage of a rectifier transistor (113) at a timing substantially equal to the timing that one edge of the first control signal is generated and falls below the threshold voltage of the rectifier transistor (113) at a timing earlier by predetermined time than the timing that the other edge of the first control signal is generated.

The invention discloses an abnormal protection circuit for an intelligent power module. The abnormal protection circuit comprises a first P-channel metal oxide semiconductor (PMOS) transistor 301, a first N-channel metal oxide semiconductor (NMOS) transistor 302, a lower bridge arm power supply 303, a first insulated gate bipolar transistor (IGBT) 304, a second PMOS transistor 305, a second NMOS transistor 306, an upper bridge arm power supply 307 and a second IGBT 308. A lower bridge arm driving signal LIN is connected with a gate of the first PMOS transistor 301, the gate of the first NMOS transistor 302 and an input end of the first abnormal protection circuit 309. A drain of the first PMOS transistor 301 is connected with the drain of the first NMOS transistor 302, and is also connected with the gate of the first IGBT 304 and the first and second output ends of the first abnormal protection circuit 309, and the point of the later connection is marked as LO. The abnormal protection circuit can timely discover the abnormality an IGBT gate connecting line and timely switch the IGBT off, and has the characteristics of simple and rational structure, operational flexibility, high degree of safety and wide application range.

The invention relates to a battery balanced charging controller and a battery module thereof. The battery balance charging controller comprises a voltage division device, a switch module and a balanced circuit, wherein the voltage division device is coupled between a first end and a second end of a battery and provides an upper reference potential and a lower reference potential, and the upper reference potential is higher than the lower reference potential; the switch module comprises a first switch and a second switch; the balanced circuit is coupled with a connecting point, the voltage division device and the switch module and determines whether balanced charging current flows through the first switch or the second switch or not according to the potential of the connecting point, the upper reference potential and the lower reference potential, which battery unit has insufficient voltage in the battery module is judged by utilizing the reference voltage provided by the voltage division device, and the balanced circuit is adopted to control the switch module so that the charging current of the battery unit with lower voltage is higher than that of a battery unit with higher voltage, thereby the voltages of all batteries can be ensured to be consistent while in fully charging. The battery module comprises battery units with the number of N+1and battery balanced charging controllers with the number of N, can be applied to battery balanced charging controllers and has wider application scope.

The invention discloses a GaN power device drain electrode modulation circuit which comprises a modulation switch tube gate driving circuit, a modulation switch tube, a differential voltage comparing network, a dead-time control logic circuit, a discharging switch tube gate driving circuit, a discharging switch tube and a power device. Through the modulation switch tube gate driving circuit and the modulation switch tube, charging and discharging of a power amplifier can be controlled, and the function of drain electrode modulation is achieved. Through the discharging switch tube gate driving circuit and the discharging switch tube, quick discharging of the power device can be achieved. Through the differential voltage comparing network and the dead-time control logic circuit, simultaneous connection of the modulation switch tube and the discharging switch tube can be avoided. In addition, a modulation output signal rising edge and lowering edge are short in time, driving capacity is high, logic control is safe, and circuit design is simple.

A DC converter comprises a half bridge supply circuit and one or more flyback or forward converter output circuits, and optionally also an LLC converter whose control can determine a common variable switching frequency. The half bridge supply circuit produces a 50% duty output alternating between two input voltages, such as zero and a voltage Vin. In each flyback or forward converter output circuit, a switch connects a transformer primary to the half bridge supply circuit output in a PWM controlled manner to regulate a respective flyback or forward converter DC output which is produced by the converter output circuit, with a duty ratio less than 50% whereby switching losses are reduced. Soft switching is further facilitated by the half bridge supply circuit having two transistors controlled in a complementary manner.

A PDP driving apparatus drives a plasma display panel (PDP) having sustain electrodes, scan electrodes, and address electrodes. The PDP driving apparatus has a plurality of switch elements. At least one of the plurality of switch elements is a normally-on switch element which turns on while a driving voltage is not applied to itself.

In a self-excited generator 1 including an automatic voltage regulator (AVR) 10, a condensive load protection device includes: a field current control driver 21 which is connected to the field winding 6 in series and controlled to be ON / OFF by a drive circuit 23 of the AVR 10 to supply a field current to the field winding 6; and a condensive load protecting rotor short-circuit driver 22 which is connected in parallel to the field winding 6, and supplies a short-circuit current to the field winding 6 by being turned ON, and a bootstrap circuit 30 is connected as a drive power supply of the field current control driver and the condensive load protecting rotor short-circuit driver, and the bootstrap circuit 30 includes a capacitance portion 32 in which charges are accumulated when the field current control driver 21 is ON.

A common-source circuit including two branches in parallel between a terminal of application of a voltage and a current source, each branch comprising: a series association of a resistor and a transistor, having their junction point defining an output terminal of the branch; a first switch connecting an input terminal of the branch to a control terminal of the transistor; and a controllable stage for amplifying data representing the level present on the output terminal of the opposite branch.

The present invention discloses a synchronous rectification control circuit, a power converter and a control method thereof. The synchronous rectification control circuit comprises a continuous current time detection circuit which is coupled to the power end of a synchronous switch tube and is used for obtaining a continuous current time signal, a rectification time control circuit which is coupled to the continuous current time detection circuit and is used for obtaining continuous current time information according to the continuous current time and thus generating a rectification time control signal, and a logic gate which is used for generating the switch control signal of the synchronous switch tube according to the continuous current time signal and the rectification time control signal, wherein the rectification time control circuit stores the first continuous current time information of a former switch period and compares the first continuous current time information of the former switch period and the second continuous current time information of a current switch period, and thus generates the rectification time control signal so as to avoid the simultaneous conduction of a main switch tube and a simultaneous switch tube. The synchronous rectification control circuit is compatible with a current continuous mode and a current interruption mode.

The invention discloses a frequency conversion method of a non-ferrous metal electromagnetic stirrer and a frequency conversion device for realizing the frequency conversion method. The method comprises the following steps of: storing self parameters and control parameters of the stirrer in a memory; calculating and converting the parameters into a plurality of static pulse trigger angle information for controlling the motion of an inverter set and duplicating the information into a mapped memory as dynamic pulse trigger angle information; detecting a voltage value of the input end of the inverter set; detecting an output current value; comparing a practical periodic value of load current with a preset value; according to the difference between the practical periodic value of the load current and the preset value, quantitatively adjusting a ratio of an expected output voltage effective value to a practical input voltage effective value in a conduction angle calculation formula to correct the plurality of dynamic pulse trigger angle information one by one; then, sequentially outputting the plurality of dynamic pulse trigger angle information to drive the inverter set to work; and finally, enabling a practical frequency conversion frequency to be same as a preset frequency. The frequency conversion method of the non-ferrous metal electromagnetic stirrer, disclosed by the invention, has the advantages of good output waveform consistency and working stability and reliability.

The invention discloses a method for driving a switching tube of a power unit board, which comprises the following steps of: respectively receiving a pulse width modulation signal from a master control board and a dead time value signal corresponding to the pulse width modulation signal; after the dead time value signal is analyzed, obtaining a dead time value; analyzing a dead time value signal to obtain a dead time value; comparing the dead time value obtained after the dead time value signal is analyzed with a preset numerical value; if the dead time value obtained by analyzing the dead time value signal is less than the preset numerical value, determining the preset numerical value as the dead time value to be loaded into the pulse width modulation signal; loading the determined dead time value to be loaded into the pulse width modulation signal into the pulse width modulation signal to generate a new pulse width modulation signal; and according to the new pulse width modulation signal, driving switching tubes in the power unit board. According to the method for driving the switching tube of the power unit board, which is disclosed by the invention, the upper switching tube and the lower switching tube are prevented from being simultaneously conducted.

The invention consists of resistor, capacitor and OR gate. One of OR gate pins is connected to the control signal inputting line, and the other one is connected to the control signal inputting line after connected to said resistor in series and is grounded through said capacitor. After adding dead area protective circuit, the electrical prospecting transmitter has a required dead area time not relating to the control waveform. With only given control signals, the required dead area time can be generated by the invention.

The invention relates to a repelling drive circuit for an H bridge of a motor. The repelling drive circuit comprises drive circuits which are connected with four bridge arms of an H bridge circuit respectively, wherein each bridge arm drive circuit comprises an isolating photocoupler for carrying out photoelectric isolation, and a repelling photocoupler for carrying out repelling on the bridge arm drive circuits at the same side of the H bridge; the repelling photocouplers on the same bridge arm are connected with primary sides of the isolating photocouplers in series; and secondary sides of the repelling photocouplers are connected with the primary sides of the isolating photocouplers on different bridge arms at the same side, so that the repelling photocouplers are simultaneously conducted when signals of the isolating photocouplers at the same side of the H bridge are controlled to be simultaneously effective. The secondary sides of the repelling photocouplers are connected with the primary sides of the isolating photocouplers on different bridge arms at the same side and the signals form a passage through the secondary sides of the repelling photocouplers, so that the isolating photocouplers are cut off; and switch tubes of the upper bridge arm and the lower bridge arm at the same side of the H bridge are free of a drive signal to achieve the target of drive repelling of the motor.

The invention relates to a multiphase self-current sharing high gain DC converter and a control strategy thereof. The converter includes an input power, M boost inductors, M upper arm switch tubes, Mlower arm switch tubes, M-1 switch capacitor, a load and a filter capacitor which form M input phase numbers and M-1 switch capacitor networks. The control strategy adopted by the DC converter is thatthe upper arm switch tubes of the DC converter and the corresponding lower arm switch tubes are set to be complementarily opened; duty ratios D of the lower arm switch tubes are set to be not smallerthan 0.5 and smaller than 1 through driving signals, and duty ratios of all the lower arm switch tubes are the same; the adjacent lower arm switch tubes adopt the interleaving control strategy, phasedifference of the driving signals of any two adjacent phase lower arm switch tubes is in the range of [2pi(1-D), 2piD], wherein the D is the duty ratio. Through the control strategy, self-current sharing and high voltage gain can be automatically realized, self-current sharing can be automatically realized in the D range, the D is not smaller than 0.5 and smaller than 1 regardless a value of thephase number M, and the M is not smaller than 2.

A boost clock generation circuit (500) including: a first switch circuit (502) connected between a first power supply line and a first clock output line to which the first boost clock signal is output; a second switch circuit (504) connected between a second power supply line and the first clock output line; a third switch circuit (506) connected between a third power supply line and a second clock output line to which the second boost clock signal is output; and a fourth switch circuit (508) connected between a fourth power supply line and the second clock output line. One of the first and second switch circuits is exclusively turned ON, and one of the third and fourth switch circuits is exclusively turned ON. The level of current drive capability of the first switch circuit differs from the level of current drive capability of the third switch circuit; and the level of current drive capability of the second switch circuit differs from the level of current drive capability of the fourth switch circuit.

The invention relates to an inductive load-based metal-oxide semiconductor field-effect transistor (MOSFET) switch control method, solving problems of loss and off peak in on and off of the MOSFET device under inductive load. The method uses a control signal module, a gate resistance switch module, an inductive load module and a switch device. The method is characterized in that the control signalmodule outputs a control signal to the gate resistance switch module, based on different control signals, the gate resistance switch module uses a proper gate resistance group to control on and off of the switch device, finally, the on and off loss is lowered, and voltage and current oscillation and overshoot are prohibited.

The invention discloses a self-oscillation DC-DC circuit. The source electrode of a switch MOS tube M1 is connected with a DC power supply Vin, the drain electrode of the switch MOS tube M1 and the drain electrode of a switch MOS tube M2 are connected with one end of an energy storing inductor L1, the grid electrode of the switch MOS tube M1 and the grid electrode of the switch MOS tube M2 are connected to two output ends of a switch driver respectively, the source electrode of the switch MOS tube M2 is connected to the ground, the other end of the energy storing inductor L1 is connected with the anode of an energy storing capacitor C1 and a load, the cathode of the energy storing capacitor C1 is connected to the ground, the two input ends of a triangular wave generation circuit are connected to the two ends of the energy storing inductor L1 in parallel, the output end of the triangular wave generation circuit is connected with the source signal input end of a comparison circuit, two window signal input ends of the comparison circuit are connected to the window voltage, and the output end of the comparison circuit is connected with the input end of the switch driver. The self-oscillation DC-DC circuit is characterized by simple structure, self oscillation, free of an amplification circuit, rapid response, low power consumption, low electromagnetic interference and the like.

The invention provides an interlocking drive circuit. The interlocking drive circuit comprises a main control chip; a first IGBT driving chip which is connected with the main control chip and is usedfor receiving and responding to a driving signal of the main control chip; a second IGBT driving chip which is connected with the main control chip and is used for receiving and responding to the driving signal of the main control chip, wherein a driving signal of the first IGBT driving chip is used as a grounding signal of the second IGBT driving chip; a driving signal of the second IGBT drivingchip is used as a grounding signal of the first IGBT driving chip, and the first IGBT driving chip and the second IGBT driving chip are optical coupling type driving chips. According to the scheme, the simultaneous conduction of the first IGBT driving chip and the second IGBT driving chip can be avoided, the problem of short circuit of the DC bus is avoided, and the technical effect of effectivelyprotecting the driving chips is achieved.

The application provides a pulse width modulation waveform output method, a charging / discharging controller and a storage medium, and relates to the technical field of the charging / discharging field.The method is applied to the charging / discharging controller, and comprises the following steps: setting a first pin as a push-pull mode, and a second pin and a third pin as open-drain modes, and outputting the corresponding pulse signal, the complementary signal or the DC constant signal through the first pin, the second pin and the third pin, thereby enabling a second output end to skip to highlevel and maintain for the first preset duration after the first DC pulse signal is skipped as the low level, and then performing following mode output, or enabling the second output end to output thecomplementary output signal in complementary with the first DC pulse signal, thereby performing complementary mode output. Through the method provided by the application, the outputs of the followingmode and the complementary mode are accomplished, and the cost of the small power controller in the charging / discharging is reduced.

The invention discloses a bidirectional current Hall sensor circuit, which comprises an annular hollow coil, a Hall chip arranged at a notch of the annular hollow coil, an H-bridge circuit coupled with the Hall chip and the annular hollow coil, a voltage division circuit coupled with the H-bridge circuit, a signal processing unit coupled with the voltage division circuit, an amplification drivingcircuit which is arranged between the Hall chip and the H-bridge circuit, and a power supply module which is coupled with the amplification driving circuit and the H-bridge circuit. According to the circuit, the H-bridge circuit is utilized, so that the annular hollow coil generates a bidirectional magnetic field, the output voltage of the voltage division circuit during dynamic magnetic balance is acquired, the current magnitude is calculated, the current direction is judged, the high-current bidirectional flowing current of the energy storage battery is accurately measured, the SOC estimation precision is further improved, and the SOC estimation accuracy is improved. The invention further discloses a current detection method based on the bidirectional current Hall sensor circuit, and high-precision bidirectional measurement of the direct current is achieved.

The invention provides a lighting arrester experimental device and method based on volt-ampere characteristic deviation. A corresponding experimental circuit is arranged for each segment of lightningarrester, and each experimental circuit is provided with a piezoresistor, a switch and an ampere meter. When any one segment of the lightning arrester is tested, only the switch of the lightning arrester is switched off, and the switches of other segments of the lightning arresters are normally switched on; the circuits where the switches are kept switched on normally are equivalent to the situation that the piezoresistors are accessed, compared with the situation that no piezoresistor is accessed, the volt-ampere characteristic is deviated overall, the starting voltage is improved, so that the tested segment of the lightning arrester of is conductively connected ahead of other segments of the lightning arresters, and thus the experiment of the lightning arrester is not influenced by the existence of other segments of the lightning arresters; the accuracy of experimental data is improved, and whether or not defects exist in the segments of the lightning arresters can be judged more accurately.

In a self-excited generator 1 including an automatic voltage regulator (AVR) 10, a condensive load protection device includes: a field current control driver 21 which is connected to the field winding 6 in series and controlled to be ON / OFF by a drive circuit 23 of the AVR 10 to supply a field current to the field winding 6; and a condensive load protecting rotor short-circuit driver 22 which is connected in parallel to the field winding 6, and supplies a short-circuit current to the field winding 6 by being turned ON, and a bootstrap circuit 30 is connected as a drive power supply of the field current control driver and the condensive load protecting rotor short-circuit driver, and the bootstrap circuit 30 includes a capacitance portion 32 in which charges are accumulated when the field current control driver 21 is ON.

The invention discloses a modular pulse high-voltage power supply based on a single-chip microcomputer. The modular pulse high-voltage power supply comprises the single-chip microcomputer, a sink current unit, a pull current unit, a high-voltage direct current unit, two low-voltage side MOSFET gate driving units and two high-voltage side MOSFET gate driving units. The input end of the first low-voltage side MOSFET gate driving unit is connected with the output end of the single-chip microcomputer. The output end of the first low-voltage side MOSFET gate driving unit is sequentially connected with the first high-voltage side MOSFET gate driving unit, the sink current unit and the high-voltage direct current unit. The input end of the second low-voltage side MOSFET gate drive unit is connected with the output end of the single-chip microcomputer. The output end of the second low-voltage side MOSFET gate drive unit is sequentially connected with the second high-voltage side MOSFET gate drive unit and the pull current unit. Pulse signals sent by the single-chip microcomputer are transmitted by all units, controllable high-voltage square pulses are generated at the output end. Meanwhile, the high-voltage square pulse generator has the advantages of being modularized, extensible, low in cost and the like.

The invention provides a driving circuit with a buffer structure and an integrated circuit; the driving circuit comprises the buffer structure, a first transistor, a second transistor, a third transistor, a first inverter and a second inverter, the output end of the first inverter is connected to the first transistor after passing through the second inverter, and the output end of the second inverter is connected to the third transistor. The output end of the first phase inverter is connected to the second transistor, and the output end of the first phase inverter is connected to the third transistor through the buffer structure. Thus, the third transistor and the buffer structure are added on the basis of the original circuit, and the buffer structure is used for providing time delay so as to relieve the time delay between the first transistor and the second transistor in the original circuit, so that the problem that the first transistor and the second transistor are conducted at thesame time when the level of an input signal is changed is avoided.

The invention discloses a simple pulse switch power supply PWM generation circuit and method. The PWM generation circuit comprises a resonance module, a dead zone time setting module and a shaping reverse module. The dead zone time setting module is electrically connected between the resonance module and the shaping reverse module. The resonance module is subjected to self-excited oscillation to generate square signals. After the square signals pass through the dead zone time setting module and the shaping reverse module in sequence, a first PWM pulse signal and a second PWM pulse signal which are used for driving bridge-wall-different MOS transistors of a pulse switch power supply respectively are obtained, the first PWM pulse signal and the second PWM pulse signal being the same in duty ratio and having set dead zones. The circuit is simple and high in cost performance; the circuit is in complete hardware implementation; the whole processing process does not need the intervention of control circuits such as CPU and the like; the circuit is high in reliability and effectively helps to solve the defects that in the prior arts, the size a chip is big and the number of pins is large; and the peripheral circuit of the circuit only has resonance module and the dead zone time setting module, so that the size of the pulse switch power supply is allowed to be minimized.

The invention discloses a method for driving a switching tube of a power unit board, which comprises the following steps of: respectively receiving a pulse width modulation signal from a master control board and a dead time value signal corresponding to the pulse width modulation signal; after the dead time value signal is analyzed, obtaining a dead time value; analyzing a dead time value signal to obtain a dead time value; comparing the dead time value obtained after the dead time value signal is analyzed with a preset numerical value; if the dead time value obtained by analyzing the dead time value signal is less than the preset numerical value, determining the preset numerical value as the dead time value to be loaded into the pulse width modulation signal; loading the determined dead time value to be loaded into the pulse width modulation signal into the pulse width modulation signal to generate a new pulse width modulation signal; and according to the new pulse width modulation signal, driving switching tubes in the power unit board. According to the method for driving the switching tube of the power unit board, which is disclosed by the invention, the upper switching tube and the lower switching tube are prevented from being simultaneously conducted.

The invention discloses an abnormal protection circuit for an intelligent power module. The abnormal protection circuit comprises a first P-channel metal oxide semiconductor (PMOS) transistor 301, a first N-channel metal oxide semiconductor (NMOS) transistor 302, a lower bridge arm power supply 303, a first insulated gate bipolar transistor (IGBT) 304, a second PMOS transistor 305, a second NMOS transistor 306, an upper bridge arm power supply 307 and a second IGBT 308. A lower bridge arm driving signal LIN is connected with a gate of the first PMOS transistor 301, the gate of the first NMOS transistor 302 and an input end of the first abnormal protection circuit 309. A drain of the first PMOS transistor 301 is connected with the drain of the first NMOS transistor 302, and is also connected with the gate of the first IGBT 304 and the first and second output ends of the first abnormal protection circuit 309, and the point of the later connection is marked as LO. The abnormal protection circuit can timely discover the abnormality an IGBT gate connecting line and timely switch the IGBT off, and has the characteristics of simple and rational structure, operational flexibility, high degree of safety and wide application range.