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30 results about "Worst-case execution time" patented technology

The worst-case execution time (WCET) of a computational task is the maximum length of time the task could take to execute on a specific hardware platform.

Priority rollback protocol

Mechanisms for enforcing limits to resource access are provided. In some embodiments, synchronization tools are used to reduce the worst case execution time of selected processing sequences. In one example, instructions from a first processing sequence are rolled back using rollback information stored in a data structure if a higher priority processing sequence seeks access to the resource.
Owner:FIJI SYST

Method for measuring task CPU occupancy rate in multitasking operation system

The present invention provides a method to measure the CPU occupancy factor of a multi-task operation system, and the method comprises the procedures that (a) a high-priority timing statistic task is established to clear up all statistics, and a statistic interval is arranged; (b) the time points at the entrance of the interrupt processing routine and at the exit of the interrupt processing routine are recorded; the difference between the two time points is an once-execution time of the interrupt processing routine, and the time is accumulated; (c) when switching the task, the task starting time point when the task is switched in and the task ending time point when the task is switched off are respectively recorded; the time difference of the same task between the task ending time point and the task starting time point deducted by the interrupt processing routine execution time contained in the task execution process is the once-execution time of the task, and the time is accumulated; (d) when the statistic interval is ended, the total execution time of each task is mounted to the total execution time of the interrupt processing routine to get the total execution time of the system in the statistic interval, thereby calculating the CPU occupancy factor of every task and the interruption.
Owner:ZTE CORP

Instruction prefetching content selecting method for optimizing WCET (worst-case execution time) of real-time task

The invention provides an instruction prefectching content selecting method for optimizing WCET (worst-case execution time) of a real-time task. A hardware structure of a basic-block information table (BBIT) is added in high-speed caching hardware of an existing instruction. The instruction prefectching content selecting method includes: initializing hardware configuration, collecting a static routine base block set via a compiler or a static routine character analyzing tool, removing base blocks only covering one storage block, collecting execution frequentness of every program base block under worst-case execution condition, sequencing the program base blocks according to the execution frequentness, selecting information of an appointed amount of program base blocks according to the sequence, and storing the information in the BBIT. During a high-speed cache accessing process, high-speed instruction cache and the BBIT are searched at the same time, high-speed instruction cache accessing loss under the worst-case execution condition can be effectively avoided, requirements on the real-time task are met, and meanwhile, the instruction prefectching content selecting method can effectively reduce hardware design cost, and is simple and direct to realize.
Owner:BEIHANG UNIV

Signal processing apparatus

Signal stream processing jobs contain tasks (100), each task (100) to be performed by repeated execution of an operation that processes a chunk of data from a stream. Each job comprises a plurality of the tasks (100) in stream communication with one another. A plurality of processing units (10), which are mutually coupled for the communication of signal streams execute that tasks. A preliminary computation is performed for each job individually, to determine execution parameters required for the job to support a required minimum stream throughput rate if each task of the job is executed in a respective context wherein opportunities to start execution of the task occur separated at most by a cycle time T defined for the task. At run time combination of jobs is selected for execution. Groups of the tasks of the selected combination of jobs are assigned to respective ones of the processing units (10), checking that for each particular processing unit (10) a sum of worst case execution times for the tasks assigned to that particular processing unit (10) does not exceed the defined cycle time T defined for any of the tasks (100) assigned to the particular processing unit (10). The processing unit (10) execute the selected combination of jobs concurrently, each processing unit (10) time multiplexing execution of the group of tasks (100) assigned to that processing unit (10).
Owner:NXP BV

Systems and methods of task allocation in a multiprocessing environment having power management

Systems and Methods for task allocation in a multiprocessor environment employing power management techniques are described wherein tasks are allocated relative to the density given by the ratio of worst-case-execution time and deadline of a task and also the harmonicity of a task's period with respect to a task-set. Tasks are allocated to a given processor based on either minimum density or maximum harmonicity depending on which allocation results in a lower clock frequency. Assigning a task to the processor with lowest density results in balancing the density across processors while assigning task to the processor with maximum harmonicity attempts to maximize the utilization of the processor.
Owner:TEXAS INSTR INC

Task scheduling method based on task application signal and execution cost value of processor core

The invention relates to a task scheduling method based on a task application signal and an execution cost value of a processor core. The task scheduling method comprises the following steps: (1) the task application signal: a global linked list and a processor core scheduling queue are adopted to record a task; (2) the execution cost value of the processor core: each processor core maintains one execution cost value vector, and the processor core calculates to obtain the execution cost value of each task in the global linked list, and stores the execution cost value of each task into the execution cost value vector; and (3) task scheduling probability: the processor core calculates the probability for scheduling the task to the processor core scheduling queue from the global linked list according to the execution cost value of the task and the application signal of the task. The global linked list and the processor core scheduling queue are adopted to record tasks, the application signal intensity of the task and the task execution cost value of the processor core are used as task scheduling criterions, cost generated in a task transfer process can be effectively reduced, and task execution time is shortened.
Owner:HARBIN ENG UNIV

Signal processing apparatus

Signal stream processing jobs contain tasks (100), each task (100) to be performed by repeated execution of an operation that processes a chunk of data from a stream. Each job comprises a plurality ofthe tasks (100) in stream communication with one another. A plurality of processing units (10), which are mutually coupled for the communication of signal streams execute that tasks. A preliminary computation is performed for each job individually, to determine execution parameters required for the job to support a required minimum stream throughput rate if each task of the job is executed in a respective context wherein opportunities to start execution of the task occur separated at most by a cycle time T defined for the task. At run time combination of jobs is selected for execution. Groupsof the tasks of the selected combination of jobs are assigned to respective ones of the processing units (10), checking that for each particular processing unit (10) a sum of worst case execution times for the tasks assigned to that particular processing unit (10) does not exceed the defined cycle time T defined for any of the tasks (100) assigned to the particular processing unit (10). The processing unit (10) execute the selected combination of jobs concurrently, each processing unit (10) time multiplexing execution of the group of tasks (100) assigned to that processing unit (10).
Owner:NXP BV

Harmonious perception multiprocessor scheduling method for multi-probabilistic parameter real-time tasks

ActiveCN110865886ASolve FragmentationGuaranteed probabilistic real-time demandResource allocationProcessor schedulingMulti processor
The invention discloses a harmonious perception multiprocessor scheduling method for multi-probabilistic parameter real-time tasks, and belongs to the technical field of real-time systems. The harmonious perception multiprocessor scheduling method comprises three steps of calculating a harmony coefficient between every two tasks in a task set, dividing all tasks in a real-time task set containingn independent probabilities into p task subsets based on the harmony coefficient, and generating a real-time task set scheduling scheme oriented to multiple probabilistic parameters. The fragmentationproblem of CPU resource utilization in multi-probabilistic parameter real-time task multiprocessor scheduling based on probabilistic worst case execution time and probabilistic minimum arrival interval time is solved. The worst task execution time and the minimum arrival interval time in the task scheduling model are probabilistic, and the model application range is wider. In addition, the harmony relationship between the task load and the task is comprehensively considered in the task scheduling process, and the schedulability and the resource utilization rate of the system are improved.
Owner:DALIAN UNIV OF TECH

Method of managing the energy consumption of an application executable in various environments and software architecture implementing such a method

The application being executable by hardware comprising a set of processors using an operating system, a method comprises at least the following steps: a first step of identifying the time constraints of the application; a second step of annotating code sections of the application that are subject to a time constraint, said annotating being performed by means of software markers, the software markers delimiting code segments; a third step of determining the worst case execution times of the segments in a given set of execution modes; a fourth step of memorizing the execution times of the segments in an execution library for each execution mode, said library being able to be interfaced with said hardware, said operating system and said application and to execute an energy management strategy by controlling the state of the processors.
Owner:THALES SA

Data packet scheduling method and device

The embodiment of the application provides a data packet scheduling method and device. The method includes the following steps: executing a first judgement operation, wherein the first judgement operation includes: determining whether a ratio of a worst case execution time (WCET) corresponding to a first service data packet of first user equipment to be scheduled in a current scheduling period toa relative cut-off time is greater than a preset value; if the ratio is greater than the preset value, abandoning the scheduling of the first service data packet, taking a second service data packetof second user equipment to be scheduled as a new first service data packet, and returning to execute the first judgement operation until the ratio of the WCET corresponding to the new first service data packet to the relative cut-off time is not greater than the preset value, and scheduling the new first service data packet. Thereby, compared with scheduling algorithms in the prior art, a high utilization rate of the scheduling processing capability of the data packet scheduling device can be realized in the data packet scheduling method provided by the embodiment.
Owner:BEIJING UNIV OF POSTS & TELECOMM
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