Heterogeneous multi-core system task allocation method and device based on shared resource access

A technology for sharing resources and system tasks, applied in the field of computer architecture, can solve problems such as reducing device power consumption, a large amount of idle time, and not considering the impact of energy consumption on the system

Pending Publication Date: 2022-04-15
CHONGQING UNIV OF POSTS & TELECOMM
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0013] This technical solution has a lot of idle time after the allocation is completed, and the impact of energy consumption on the system is not considered during the allocation process, which is not conducive to reducing equipment power consumption

Method used

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  • Heterogeneous multi-core system task allocation method and device based on shared resource access
  • Heterogeneous multi-core system task allocation method and device based on shared resource access
  • Heterogeneous multi-core system task allocation method and device based on shared resource access

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specific Embodiment 1

[0097] This embodiment is a preferred implementation manner of the method for allocating tasks in a heterogeneous multi-core system based on shared resource access in the present invention.

[0098] see figure 1 ,Such as figure 1 As shown, the method of the present embodiment includes:

[0099] S101, the system is powered on and started, a set of periodic tasks τ={τ 1 ,τ 2 ,…,τ I} assigned to the system;

[0100] S102, setting the execution frequency of each processor core

[0101] S103. Calculate the actual execution time and worst case execution time of each task on each processor core;

[0102]

[0103]

[0104] Among them, T i j for the task τ i in the processor core j The actual execution time on Denotes the task τ i the sum of the worst-case execution times for accessing a subset of its shared resources, Denotes the task τ i The number of critical sections of , Denotes the task τ i The worst-case execution time of the χ-th critical section acce...

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Abstract

The invention discloses a heterogeneous multi-core system task allocation method based on shared resource access, which comprises the following steps of: calculating worst-case execution time and actual execution time of each task on each processor core; calculating the energy density of each task on each processor and the energy density difference value of each task; and sequentially selecting the unallocated task with the maximum energy density difference, and allocating the task to the processor core with the maximum resource similarity with the task in the selectable processor cores. The invention further discloses a heterogeneous multi-core system task allocation device based on shared resource access, in the technical scheme, the task allocation sequence is selected according to the energy density difference values of the tasks from large to small, and the energy consumption of processor cores of the heterogeneous multi-core system can be effectively reduced.

Description

technical field [0001] The invention belongs to the field of computer architecture, and in particular relates to a heterogeneous multi-core system task allocation method and device based on shared resource access. Background technique [0002] With the rapid development of computer technology, the use of embedded devices is becoming more and more extensive, especially the rapid growth of consumer electronics products. In order to meet the processing requirements of embedded devices for different tasks, heterogeneous multi-core processors are gradually favored by the market. While the computing power increases, the power consumption of the device also increases. This will not only reduce the working hours of embedded devices, but also generate too much heat, resulting in a decline in user experience. How to reduce the power consumption of heterogeneous multi-core embedded devices has become a An urgent problem to be solved in heterogeneous multi-core system-on-chip technolog...

Claims

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Application Information

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IPC IPC(8): G06F9/50
CPCY02D10/00
Inventor 夏军兰浩李铮陈磊
Owner CHONGQING UNIV OF POSTS & TELECOMM
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