715 results about "Voltage modulation" patented technology

A method and system for applying addressing voltages to pixels of a display involves receiving input data. The input data includes an indication of an addressing voltage impulse to be applied to a pixel via an electrode. One or more voltage sources are selected, to provide the addressing voltage impulse. The one or more voltage sources each have a pre-selected voltage. The selected one or more voltage sources are electrically connected to an electrode to apply the addressing voltage impulse to the pixel.

A method and system for applying addressing voltages to pixels of a display involves receiving input data. The input data includes an indication of an addressing voltage impulse to be applied to a pixel via an electrode. One or more voltage sources are selected, to provide the addressing voltage impulse. The one or more voltage sources each have a pre-selected voltage, The selected one or more voltage sources are electrically connected to an electrode to apply the addressing voltage impulse to the pixel. The invention also provides a method of driving an electro-optic display which uses an intermediate image of reduced bit depth, and a method of driving an electro-optic display which uses a limited number of differing drive voltages, with higher voltage pulses being used before lower voltage pulses.

The present invention provides a primary-side flyback power converter that supplies a constant voltage output and a constant current output. To generate a well-regulated output voltage under varying load conditions, a PWM controller is included in the power converter in order to generate a PWM signal controlling a switching transistor in response to a flyback voltage sampled from a first primary winding of the power supply transformer. Several improvements are included in this present invention to overcome the disadvantages of prior-art flyback power converters. Firstly, the flyback energy of the first primary winding is used as a DC power source for the PWM controller in order to reduce power consumption. A double sample amplifier samples the flyback voltage just before the transformer current drops to zero. Moreover, an offset current is pulled from a detection input of the double sample amplifier in order to generate a more accurate DC output voltage. The offset current is generated in response to the temperature in order to compensate for temperature-induced voltage fluctuations across the output rectifier. Ultimately, in order to maintain a constant output current, the PWM controller modulates the switching frequency in response to the output voltage.

The present invention provides techniques for emissive pixels of flat panel displays. Specifically, pixel feedback and a combination of voltage modulation and pulse width modulation are used to improve the quality and consistency of aging pixels. Based on feedback, an image frame is divided into sub-frames of various time periods. Also based on feedback, a voltage, or voltages of different voltage levels, is (are) applied to the selected sub-frames to generate an image frame of a particular gray level. The human eye integrates the effects of the voltage and pulse width modulation techniques that are applied to the various sub-frames of the image frame, over the duration of the image frame.

A method and system for applying addressing voltages to pixels of a display involves receiving input data. The input data includes an indication of an addressing voltage impulse to be applied to a pixel via an electrode. One or more voltage sources are selected, to provide the addressing voltage impulse. The one or more voltage sources each have a pre-selected voltage, The selected one or more voltage sources are electrically connected to an electrode to apply the addressing voltage impulse to the pixel. The invention also provides a method of driving an electro-optic display which uses an intermediate image of reduced bit depth, and a method of driving an electro-optic display which uses a limited number of differing drive voltages, with higher voltage pulses being used before lower voltage pulses.

Power amplifier arrangements, methods, and software arranged to receive a power input which is voltage-modulated responsive to at least one control signal representative of the data signal. The data input to the power amplifier is pre-distorted and the resulting power amplification is substantially linear. The arrangement may be used in wireless base station transmitters, but is not limited to such applications. Improved data transmission services are also provided which make use of such power amplifiers.

The present invention provides a primary-side flyback power converter that supplies a constant voltage output and a constant current output. To generate a well-regulated output voltage under varying load conditions, a PWM controller is included in the power converter in order to generate a PWM signal controlling a switching transistor in response to a flyback voltage sampled from a first primary winding of the power supply transformer. Several improvements are included in this present invention to overcome the disadvantages of prior-art flyback power converters. Firstly, the flyback energy of the first primary winding is used as a DC power source for the PWM controller in order to reduce power consumption. A double sample amplifier samples the flyback voltage just before the transformer current drops to zero. Moreover, an offset current is pulled from a detection input of the double sample amplifier in order to generate a more accurate DC output voltage. The offset current is generated in response to the temperature in order to compensate for temperature-induced voltage fluctuations across the output rectifier. Ultimately, in order to maintain a constant output current, the PWM controller modulates the switching frequency in response to the output voltage.

A method and apparatus for driving an electron source in which a high-quality image display is presented by correcting a non-uniform effective current distribution caused in cold cathode elements by leakage current. A digital video signal enters a shift register where a serial-to-parallel conversion is made for each line of an image based upon a shift clock signal. One line of the image data that has been subjected to the serial-to-parallel conversion is latched in a latch circuit and then applied to a voltage modulating circuit. The latter voltage-modulates the input data and sends the modulated signal to a voltage / current converting circuit. The latter converts the voltage quantity to a current quantity, which is applied to each of the cold cathode elements of a display panel through respective column terminals. A voltage V1 is applied to the selected row wire, and a voltage V2 (V2<> V1) is applied to all other row wires, for controlling the leakage current.

A device to regulate current produced by a permanent magnet machine responsive to a plurality of phase current signals. The motor produces torque for application on a shaft. A processing and drive circuit responsive to a direct current command signal and a quadrature current command signal produces phase current signals for input to the motor. A command circuit responsive to the phase current signals, an angular position of said shaft, and a voltage input command signal to produce a direct current error signal and a quadrature current error signal. A control circuit responsive to the direct and quadrature current error signals produces the direct voltage signal command and the quadrature voltage signal command. The control circuit has a direct and quadrature proportional gain, integrator and clamp circuits. An algorithm produces limited or clamped voltage modulation index signals to obtain maximum efficiency and maximum torque per ampere in the speed range. The algorithm ensures that the current regulator does not run out of voltage by limiting the voltage vector to the achievable voltage vector range that provides maximum torque per ampere and maximum efficiency.

A variable capacitance and control system used in a compensative manner to improve efficiency in power amplifier arrangements arranged to receive a power input which is voltage-modulated responsive to at least one control signal representative of the data signal. Also included are methods and software for controlling said power amplifier arrangements including the variable capacitance and control system. The data input to the power amplifier is pre-distorted and the resulting power amplification is substantially linear. The arrangement may be used in wireless base station transmitters, for example. Improved data transmission services are also provided which make use of such power amplifiers.

A modulator arrangement for modulating an optical signal using a quadrature phase shift key for use in an optical wavelength division multiplex (WDM) optical communications system comprising a laser (2) for producing an optical signal of a selected wavelength, which signal is split by a splitter (4), each part of said split signal being applied to a respective phase modulator (6, 8) each for which phase modulators is adapted to modulate the phase of the signal in dependence on a respective drive voltages. The phase of the output of at least one modulator (6) is shiftable at least in part by a phase shifter (10), the split signals being recombined by an optical recombiner (12) to form an optical phase shift key output, wherein the output power is monitored by a detector (20), the detector signal then being used to drive a feedback arrangement to control electrodes of the phase modulators (6, 8) and / or phase shifter (10).

In a block of non-volatile memory, bit line current increases with bit line voltage. For current sensing memory systems, average bit line current during a sensing operation need only exceed a certain threshold amount in order to produce a correct result. For the first word lines being programmed in a block, memory cells connected thereto see relatively low bit line resistances during verify operations. In the disclosed technology, verify operations are performed for these first programmed word lines with lower verify bit line voltages in order to reduce excess bit line current and save power. During read operations, this scheme can make threshold voltages of memory cells connected to the lower word lines appear lower. In order to compensate for this effect, various schemes are disclosed.

A display panel includes a plurality of gate lines and a plurality of pixels disposed thereon, a gate driver which applies a gate signal to the gate lines, and a controller which controls the gate driver, where the controller includes a signal controller which generates a scanning start signal and a gate clock signal comprising a plurality of pulses, where the scanning start signal instructs to start a scanning of the gate signal, and a driving voltage modulator which generates a modulated gate-on voltage and a modulated gate-off voltage based on a basic gate-on voltage and a basic gate-off voltage, where the driving voltage modulator adds an overshoot voltage corresponding to a rising edge of a pulse of the gate clock signal to the basic gate-on voltage or adds an undershoot voltage corresponding to a falling edge of the pulse of the gate clock signal to the basic gate-off voltage.

The invention discloses an LED driving circuit and a controlling method thereof, comprising a power switch and a current sampling unit, as well as a voltage comparison unit for comparing the voltage obtained by the current sampling unit with a first reference voltage; an input voltage sampling unit for converting the sampled input voltage into a current signal; a timing unit for controlling the off-time of the power switch or presetting a fixed off-time; a logical unit for controlling the power switch by means of a power switch driving unit and for controlling the timing switch in the timing unit. The method for controlling the LED driving circuit comprises the step of modulating the off-time of the power switch with the input voltage or the step of presetting a fixed off-time. The invention can be used in LED light cluster driving with the power factor greater than 0.95.

Techniques are disclosed for increasing reliability of an integrated circuit. In one embodiment, an integrated circuit includes core chip circuitry. The integrated circuit includes means for increasing a power supply voltage V provided to the core chip circuitry, such as by increasing the voltage V to a maximum value. The integrated circuit also includes means for identifying a clock frequency F for which F<Pmax / (CV2), where C is a switching capacitance and where Pmax is a predetermined maximum power consumption of the core chip circuitry. The integrated circuit also includes means for providing a clock signal having frequency F to the circuit.

The present invention discloses a three electric level inverter control system. It contains three electric level voltage source inverter (NPC), field programmable gate array (FPGA), digital signal processor (DSP), wherein FPGA field programmable gate array (FPGA) receiving digital signal processor (DSP) sent control voltage instruction generating three electric level voltage source inverter (NPC) control signal. The present invention also discloses three level inverter control method, featuring 1, digital signal processor (DSP) transmitting space voltage vector amplitude value m and argument for controlling three level inverter triphase reference voltage, 2, field programmable gate array (FPGA) receiving DSP sent space voltage vector amplitude value m and argument, generating signal Vca, Vcb, Vcc, through direct current biasing and dead zone compensation techniques processing to generate three-phase voltage modulation signal Vca **, Vcb **, Vcc **, 3, finally respectively comparing with positive triangular wave, negative triangular wave to generate control pulse. The present invention overcomes the insufficiency of current pulse width modulation method (SVPWM) and special harmonic cancellation method (SHE-PWM), provides a fine rapidity, simple controlling, and practical three level inverter control system and method.

A standard voltage generating circuit generates standard voltages as many as the number of gradations. Then, the standard voltages are separated into standard voltages of high level and those of low level, by a selector circuit, regardless of polarities thereof. One of the standard voltages of high level thus separated by the selector circuit is selected by a Pch-arranged converting section of a D / A converting circuit. Then, the selected one of the standard voltages of high level is outputted as a gradation-display-use voltage. Meanwhile, One of the standard voltages of low level thus separated by the selector circuit is selected by an Nch-arranged converting section of the D / A converting circuit. Then, the selected one of the standard voltages of low level is outputted as a gradation-display-use voltage. With this arrangement, it is possible to attain miniaturization of a circuit and lower power consumption in a display apparatus which performs gradation display by a voltage modulation method.

Decrease in a voltage supplied to a load caused by load fluctuations is minimized. A pulse frequency modulated signal generating unit 13 outputs a signal PFMOUT having a pulse frequency modulated according to a voltage supplied to the load 20. A pulse width modulated signal generating unit 14 outputs a signal PWMOUT having a pulse width modulated according to a voltage supplied to the load 20. In a state where the signal PFMOUT is selected, a selection unit 17 refers to a determination result of a frequency determining unit 15 and selects the signal PWMOUT as on / off signal for a semiconductor switch 11 when a low-level period in one cycle of the signal PFMOUT is not more than a predetermined time period. In a state where the signal PWMOUT is selected, the selection unit 17 selects the signal PFMOUT as on / off signal for the semiconductor switch 11 when a voltage determining unit 16 detects that a DC voltage (VOUT) at the load 20 exceeds a predetermined voltage.

A method for fabricating a semiconductor device includes forming an NMOS region and a PMOS region in a substrate, forming a first stack layer including a first gate dielectric layer and a first work function layer that is disposed over the first gate dielectric layer and contains aluminum, over the PMOS region of the substrate, forming a second stack layer including a second gate dielectric layer, a threshold voltage modulation layer that is disposed over the second gate dielectric layer and contains lanthanum, and a second work function layer that is disposed over the threshold voltage modulation layer, over the NMOS region of the substrate, and annealing the first stack layer and the second stack layer, thereby forming a first dipole-interface by diffusion of the aluminum in the first gate dielectric layer and a second dipole-interface by diffusion of the lanthanum in the second gate dielectric layer, respectively.

The invention discloses a transformer-free inverter, which comprises an input capacitor, six power switching tubes, six anti-parallel diodes and two filter inductors. The switching motion is performed by using the cooperation of the six power switching tubes and the anti-parallel diodes thereof, and then when the output voltage of the inverter has zero level, the output alternating current side and the input direct current side of the inverter are in a decoupling state so as to ensure that the common mode voltage of the inverter is kept constant when the output voltage of the inverter realizes three-voltage modulation and further fully eliminate the common mode current; the switching voltage on the power switching tubes is changed to be half of the direct current input voltage, so the switching loss of the power switching tubes is reduced; and the output current ripple wave of the inverter is further reduced through frequency doubling pulse width modulation, the output electrical energy quality of the inverter is improved, and the volumes of the filter inductors are reduced so as to reduce the copper loss and magnetic loss generated on the filter inductors.

The invention provides a heterojunction carbon nano-tube field effect transistor of which a subthreshold swing is smaller than 60 millivolt / magnitude in the room temperature and a preparation method thereof. The device uses the semiconductor carbon nano-tube as the active layer, the heterojunction formed by the graphene layer and the semiconductor carbon nano-tube is used as the source end of the device, the gate medium and the gate electrode modulate the carbon nano-tube channel and the graphene / carbon nano-tube junction at the same time, so that the turn-off of the transistor is accelerated by using the character that the graphene / carbon nano-tube junction barrier is modulated by the gate voltage. The transistor can control the polarity through the selection of the source-drain metal, namely the metal of high power function is used as the source-drain electrode for realizing the p-type field effect transistor, and the metal of low power function is used as the source-drain electrode for realizing the n-type field effect transistor.

A universal series bus (USB) power supply has a DC power source, a USB power interface and a voltage modulation module. The USB power interface is for connecting to an electronic device that stores a default D+ voltage and a default D− voltage. The voltage modulation module connects to and outputs signals to the D+ and D− terminals of the USB power interface. If voltage levels of the output signals are not respectively identical to the default D+ and D− voltages, the voltage modulation module changes the voltage levels of the signals output to the D+ and D− terminals of the USB power interface until the voltage levels of the output signals are respectively identical to the default D+ and D− voltages. Therefore, the USB power supply may be applied to any kind of electronic device that is charged over a USB interface.

An envelope tracking power transmitter includes an envelope amplifier, a common-gate power modulation linearizer and a power amplifier. The envelope amplifier may receive a first envelope voltage to generate a power supply voltage that is amplified in proportion to change of the first envelope voltage. The common-gate power modulation linearizer may receive a second envelope voltage to amplify the second envelope voltage according to change of the second envelop voltage. The power amplifier may receive a first output of the envelope amplifier as a power supply voltage and a drain bias voltage, may receive a second output of the common-gate power modulation linearizer as a common gate bias voltage, and may amplify a radio frequency (RF) input signal to provide a RF output signal by maintaining an output capacitance according to an envelope of the RF input signal.

The invention discloses an LED driving circuit and a controlling method thereof, comprising a power switch and a current sampling unit, as well as a voltage comparison unit for comparing the voltage obtained by the current sampling unit with a first reference voltage; an input voltage sampling unit for converting the sampled input voltage into a current signal; a timing unit for controlling the off-time of the power switch or presetting a fixed off-time; a logical unit for controlling the power switch by means of a power switch driving unit and for controlling the timing switch in the timing unit. The method for controlling the LED driving circuit comprises the step of modulating the off-time of the power switch with the input voltage or the step of presetting a fixed off-time. The invention can be used in LED light cluster driving with the power factor greater than 0.95.

The invention provides a method and a system for over-modulating three-level space vectors. The method comprises the following steps: calculating the modulation ratio and angle of a reference voltage; dividing the modulation ratio into a first setting interval and a second setting interval; positioning the modulation ratio in the first setting interval and calculating the duty cycle of a short vector, a long vector and a medium vector by intervals according to the angle of the reference voltage; correcting the duty cycle of the short vector, the long vector and the medium vector respectively according to the magnitude of the short-vector duty cycle; calculating the N-action duty cycle and the P-action duty cycle of each phase according to the corrected duty cycle; positioning the modulation ratio in the second setting interval and calculating the keeping angle of the reference voltage; calculating the N-action duty cycle and the P-action duty cycle of each phase by intervals according to the resulting of comparing the keeping angle with the angle of the reference voltage; and conversing the N-action duty cycle and the P-action duty cycle of each phase into action time and mapping the action time back to the prior sector. The method and the system have the advantage of ensuring that SVPWM over-modulation is simple in calculation steps and higher in modulation precision.

The invention discloses a STATCOM (static synchronous compensator) control system adopting a droop control strategy and a control method thereof. The STATCOM control system adopting the droop control strategy comprises a direct-current side capacitor, a three-phase inverter bridge and an inductance-capacitance filter, wherein the direct-current side capacitor and the three-phase inverter bridge are connected in parallel and then connected with the inductance-capacitance filter, and the inductance-capacitance filter is connected to a PCC (Point of Common Coupling) of a power grid by a three-phase switch K through a coupling transformer T. The control method disclosed by the invention comprises the steps of real-time signal collection, computation of active power reference value P*, computation of reactive power reference value Q*, computation of frequency reference value omega* and voltage modulation amplitude reference value E*, computation of phase reference value Delta* and computation of voltage modulation signals; and only one PI (proportional integral) regulator and two droop control coefficients need to be regulated, thus the whole control method is easy to realize, and further the power system can better supply power to users safely, excellently and economically.

A synchronous voltage modulation circuit for resonance power converter has a resonance current extracting unit and at least one duty cycle modulation circuit. The resonance current extracting unit extracts the resonance current of the transformer for each duty cycle modulation circuit. The duty cycle modulation circuit controls the conduction period of the electronic switch on the secondary side of the transformer according to the power usage of the load connected to the power output and the resonance frequency of the resonance current on the transformer detected by the resonance current extracting unit. The conduction period increases or decreases symmetrically with respect to the central axis. The power converter output of the resonance power converter converter forms a closed loop control, thereby providing stable power to its load.

The invention discloses a method and a device for controlling three-phase unbalanced current of a virtual synchronous generator. The method comprises the following steps: establishing a rotor movement equation of the virtual synchronous generator (VSG) and a virtual excitation equation of the VSG; decomposing unbalanced voltage of a power grid into positive sequence voltage, negative sequence voltage, zero sequence voltage and corresponding phase-sequence current, and decomposing active power and reactive power output by the VSG to analyze an encountered imbalance problem; calculating a reference instruction of dq axis current according to the output three-phase voltage signal; and converting the reference instruction of the current into a pulse-width modulation (PWM) voltage modulation signal through a self-designed current inner ring, and controlling the virtual synchronous generator to run through the PWM voltage modulation signal, so as to enable the output three-phase current of the virtual synchronous generator to reach the balance. According to the control method disclosed by the embodiment of the invention, the VSG can still output three-phase balanced current when the three-phase voltage of the power grid is unbalanced, so that the operation safety of the power grid can be relatively well ensured; and the method and the device are safe, reliable, simple and convenient.