35 results about "Vandermonde matrix" patented technology

A high-rate Reed-Solomon erasure resilient codes (ERC) system and method for generating and implementing Reed-Solomon erasure-resilient codes for use in high-rate applications. High-rate applications are applications where the number of coded messages is significantly higher (such as an order of magnitude) than the number of original messages. The Reed-Solomon ERC system uses a scalar vector multiplication and addition technique and a direct inversion technique. The direct inversion technique uses specific generator matrices, including a modified Vandermonde Matrix and a Cauchy Matrix, to directly calculate an inverse of the sub-generator matrix of receiving ERC-coded messages. The scalar vector multiplication and addition technique generates high-rate Reed-Solomon codes and performs scalar vector multiplication and addition on the Galois Field for the Reed-Solomon erasure encoding / decoding operations. In effect, the Reed-Solomon codes are “tuned” for use in the high-rate environment.

The invention provides a security storage method and device based on an RS erasure code on a mobile terminal, belonging to the technical field of storage and security of computers. The method comprises the following steps: S1, while coding at a local client side, selecting a first file and / or data as a decryption key according to a coded file and / or data, storing the decryption key locally, and updating a second file and / or data in the coded file and / or data to a cloud storage space to store; and S2, obtaining inverse matrix data relative to a first generation matrix in metadata information of a locally stored file by adopting a Vandermonde matrix or a Cauchy matrix. According to the technical scheme provided by the invention, due to use of the RS erasure code, original data information cannot be obtained by decoding when user data are uploaded, stored and downloaded, even if the data are intercepted and stolen; and thus, the privacy of users can be ensured.

The invention discloses a solid state drive(SSD)-based file layout method in a large-scale storage system. According to the SSD-based file layout method, when a file is written into the storage system, a Vandermonde matrix is adopted to divide user data into n parts through the adoption of an asymmetric erasure code, the n parts of data is written on n SSDs, when the file is read to the storage system, according to arbitrary k parts (k is less than n) in the n parts data on the n SSDs, the Vandermonde matrix is used for calculating the whole file, wherein the k is the lowest quantity capable of recovering the user data, in addition, when the file is read, read requests are sent to the n SSDs, and the k parts of data returning in an earliest mode are used for recovering the data. If only garbage recovery is not carried out on the k parts of the n SSDs, the requests are free of influence of the garbage recovery. The SSD-based file layout method in the large-scale storage system has the advantages of being high in reliability, good in fault tolerance performance, long in service life of the SSD and low in influence of the SSD garbage recovery on the read requests.

The invention discloses an error control method and a system thereof, and is applicable to the fields of communication, storage and the like; and in the fields, the method or the system of the invention can effectively restore the lost data and enhance the data integrity. The method comprises the steps of generating a coding coefficient and redundant packages, generating a decoding coefficient and restoring information sources and the like. A transmitting terminal generates m redundant packages by n information sources, and transmits the information sources and redundancy packages to a receiving terminal, and as long as the sum of the numbers of the information sources and the redundant packages which are received by the receiving terminal is more than n, then n information sources can be restored. The method and the system skillfully maximize the amount of information and minimize the amount of computation by computation in a Van der Monde matrix and an extended Galois 2<q> field. The error control method or the system can be used in multicast and broadcast communication, which can acquire good effect.

The invention discloses a staggered grid finite difference method for wave field simulation, which is suitable for wave field simulation of wave equations in any medium. The invention aims at the unstable phenomenon caused by the solution of the difference coefficient in the high-order staggered grid finite difference method, and provides an algorithm based on the Vandermonde matrix to solve the difference coefficient, which effectively overcomes this problem. The method can provide accurate and stable wave field simulation results; the technical solution is easy to implement and has wide applicability.

The present invention discloses a combined signal detection and channel estimation method in a MIMO relay system, The combined signal detection and channel estimation method in the MIMO relay system includes that an ALS algorithm is adopted to fit a constructed PARAFAC model; a receiving end knows an extended code matrix C, and C is a Vandermonde matrix; for two unknown loading matrixes, one of the matrixes is updated in one step, the estimated matrix is taken as the initial value of a matrix to be estimated, and the successive alternant iteration updating is carried out until the convergence. Compared with a conventional channel estimation method and an existing PARAFAC model channel estimation method, the method provided can effectively estimate the signals without transmitting the channel training sequence and can estimate the CSI of the relay system channel at the same time.

The invention relates to the technical field of server storage, and provides an RS erasure rapid decoding method and system based on distributed storage, and the method comprises the steps: employingan added check code matrix to reassemble a k*k matrix; carrying out matrix partitioning on the newly spliced k*k matrix to obtain four n*n small matrixes A, B, C and D; calculating an inverse matrix based on the RS code and the characteristics of the Van der Monte Carlo matrix; and multiplying the calculated inverse matrix by the reordered corresponding storage database to obtain an original storage data block, thereby synthesizing a simple small matrix through splitting, saving most of operations, reducing the operation complexity and improving the operation speed.

The invention discloses an RAID model. The RAID model comprises an RAID core verification module and an RAID core scheduling module; the RAID core verification module adopts an Erasure code verification algorithm of RS code on the basis of a Vandermonde matrix, the Erasure code verification algorithm supports N data blocks to generate M verification data, and the RAID core scheduling module is used for conducting unified scheduling on all data reading and writing operations of the RAID model; the RAID core scheduling module selects N correct data blocks through a scheduling algorithm, and corresponding M verification data is calculated through the RAID core verification module; an RAID core I / O module is used for executing data reading and writing operations of the RAID; the RAID core scheduling module creates an object container containing all data. According to the RAID model, the RAID core scheduling module conducts unified scheduling on all the data reading and writing operations of the RAID, a user does not need to conduct caching for length adaptation, the verification number can be customized, no state exists for attitude to data, overall reconstruction is not needed, and the reading and writing efficiency is high.

The invention discloses a power distribution network synchronous phasor measuring method based on a Prony algorithm. The method specifically includes the following steps of establishing a Prony algorithm calculating model according to sampling data of a synchronous phasor measuring device, and obtaining a power distribution network synchronous phasor through the Prony algorithm. When the power distribution network synchronous phasor is calculated through the Prony algorithm, a differential equation coefficient in the Prony algorithm is obtained through an SVD algorithm, obtaining a root of a polynomial is converted into obtaining a matrix feature value, the time for obtaining a model coefficient item is shortened according to features of a Vandermonde matrix, and the amplitude, phase position, damping factor and frequency in the model are obtained. Under the condition that a power distribution network is greatly influenced by frequency fluctuation, non-integral harmonic waves, attenuation low frequency components, attenuation DC components and the like, the synchronous phasor can be precisely measured.

The invention discloses a data processing method and device, electronic equipment and a computer readable storage medium. The method comprises the steps: obtaining an original data block; performing right shift operation on the original data block by using a target Van der Monte Carlo matrix so as to encode the original data block to obtain an RS erasure code, wherein the element of the i-th row and the j-th column in the target Van der Monte Carlo matrix is 2 (i-1) (j-1); and storing the coded data block, wherein the coded data block comprises the original data block and a check data block. According to the method and the device, each element in the target Vandermonde matrix is an index of 2, so only the original storage block needs to be shifted based on the target Vandermonde matrix inthe encoding process, hardware implementation is simple, and all multiplier operations related to standard Vandermonde matrix encoding are omitted. Therefore, according to the data processing method provided by the invention, the calculation complexity of encoding and decoding by utilizing the Van der Monte Carlo matrix is reduced.

A system, method and computer program product for quickly and approximately solving structured regression problems. In one aspect, the system, method and computer program product are applied to problems that arise naturally in various statistical modeling settings—when the design matrix is a Vandermonde matrix or a sequence of such matrices. Using the Vandermonde matrix structure further accelerates the solution of the regression problem, achieving running times that are faster than “input sparsity”. The modeling framework speedup benefits of randomized regression for solving structured regression problems.

The invention discloses a data recovery method, system and device and a computer readable storage medium, and the data recovery method comprises the steps: adding a verification piece in a distributed storage system, and building a global position information table including the verification piece; constructing a Vandermonde matrix based on the global position information table, and calculating verification values of all verification pieces by using the Vandermonde matrix; judging whether an error slice exists in each strip of the distributed storage system or not; and if yes, recovering the data by using the coding relationship of the RAID group in the strip and the check value. According to the method and the device, the recovery support of the chip error of the additional error can be realized, and a check disk does not need to be additionally added.

An image extrapolation processing method comprises steps of determining coordinate variants of an image, interpolating known function points of the framework; constructing a Vandermonde matrix and a Vandermonde vector space, calculating the inner product between the base vectors of the subspace to obtain the degree gauge tensor of the subspace, obtaining the degree gauge tensor of the dual space of the subspace through a matrix inversion method, obtaining the base of the dual space through matrix operation, and transposing the base matrix of the dual space to obtain the pseudo inverse matrix of the Vandermonde matrix. Determining a position of the interpolated interval in the interpolation frame point; And obtaining a Vandermonde matrix with the same number of items as the interpolation framework according to the abscissa of the insertion point set. And multiplying the Vandermonde matrix of the insertion point set by the pseudo-inverse matrix to obtain an extrapolation matrix. And obtaining the pixel value of a new pixel point according to the extrapolation matrix, carrying out interpolation grid by grid in one dimension of the image pixel according to the pixel grid movement, converting the dimension, and carrying out interpolation in the other dimension after the image conversion dimension is completed until all interpolation is completed. And the image is more accurate and vivid, and development of scientific research and exploration, public security case solving and military reconnaissance is facilitated.

The embodiment of the invention discloses a video frame interpolation processing method. Frame interpolation processing is carried out on a video through utilization of Lagrange interpolation method.The method comprises the steps of reading a digital video; obtaining video information such as duration, a rate and the total frame number; determining an order of the Lagrange interpolation method; establishing a vandermonde matrix; carrying out matrix operation according to the matrix, thereby obtaining a coefficient matrix of Lagrange polynomials; determining locations of interpolated intervalsin an interpolation frame according to the total frame number of the video; setting the number of frames interpolated between two adjacent frames, and interpolating new frames between the two adjacent frames; confirming serial numbers of the interpolated frames in a new video; obtaining the vandermonde matrix with the same number of terms as that of the interpolation frame according to the serialnumbers; establishing an interpolation matrix; obtaining images of the new frames according to the interpolation matrix; and establishing frame interpolation transformation for frame interpolation, until all frame interpolation is finished. The video is relatively continuous and vivid, slow-motion replay is relatively obvious and fine, and restoration of the video for scientific research and public security case solution is facilitated.

The invention discloses a mud pulse signal verification and error correction method. The method comprises the following steps: S1, converting measurement data acquired by a sensor into a positive integer corresponding to a bit number in a linear conversion mode; s2, de-noising the measurement data; s3, sending the measurement data and M RS erasure codes generated by the Vandermonde matrix by usingthe measurement data to a ground platform through mud pulses; s4, extracting measurement data and RS erasure codes in the mud pulse signals, judging whether the whole measurement data is transmittedcorrectly or not through the RS erasure codes, if no error codes exist, regarding the group of data as correct data, and displaying the correct data on a human-computer interaction interface; and if the error code exists, performing prediction comparison verification. According to related characteristics of measurement data in measurement while drilling, prediction, comparison and verification areperformed through historical data, error correction is realized by combining global error detection and erasure correction functions of RS erasure codes, and the method has excellent inhibition capability on random errors and burst errors in a mud pulse data transmission process.

The invention discloses a WVEFC fast coding method based on a flight ad hoc network and aims at a characteristic that the requirements of different data packets in the flight ad hoc network for the real-time performance and the safety are different. According to the method, linear independence of a Vandermonde matrix is utilized, an expanded Vandermonde step coding matrix is constructed by takingthe Vandermonde matrix as a basic structure, and coding transmission is carried out on data by using the matrix. According to the method, the robustness of the flight ad hoc network is improved, and afinal discrete event simulation experiment also verifies excellent rapid delivery performance of coding.

The invention relates to the technical field of data coding and decoding, and discloses a quick coding and decoding method and system of erasure code data. The coding method of the erasure code data comprises the following steps: according to a fragmentation number n and a redundant number m, through the conversion of a Vandermonde matrix or a Cauchy matrix, obtaining a generation matrix of which the first line element and the first row element are independently 1; initializing a coding multiplication cache table; dividing data to be coded into n pieces of original data, and utilizing the multiplication cache table to calculate m check codes according to the n pieces of original data and the generation matrix; and independently storing and / or transmitting the n pieces of original data and the obtained m check codes. The generation matrix used by the coding method ensures that a Galois field multiplication operation amount can be reduced during both coding and decoding, is compatible with a copy algorithm, and drastically improves the processing speed of the erasure code data, and therefore, the reliability and the effectiveness of data in a distributed system, especially a cloud storage system, are guaranteed under a situation that data processing efficiency is not lowered and hardware cost is not increased.

A software application characterizes a nonlinear system by applying a series of test signals at full power and performing an algorithm on the resulting outputs to determine the true linear response and the order-separated outputs. The application generates a baseline test signal, multiplied by a gain factor. The application inputs the test signal to the system to produce a response. The application then generates another test signal by multiplying the baseline signal by a different gain factor. The application iterates generating test signals by multiplying by differing gain factors. The application then constructs a Vandermonde matrix of the gain factors, computes the inverse Vandermonde matrix, and convolves the inverse Vandermonde matrix with a matrix of the system responses to each of the test signals. The elements of the resulting convolution represent the order-separated outputs including the linear response output of the nonlinear system at full power.

The invention provides a coding distributed computing system. Newton-like polynomial codes are applied to the coding distributed computing system, in a computer cluster, one computer serves as a main node, other computers serve as working nodes, matrix A and matrix B multiplication is calculated in a distributed manner in the computer cluster, and a matrix A and a matrix B are divided into K blocks by the main node; a coding strategy is executed to respectively code the matrix A and the matrix B, and the matrix A and the matrix B can be decoded after the main node receives the calculation results of the K working nodes with the fastest calculation speed. The invention has the beneficial effects that the condition number is smaller, the problem that Vandermonde matrix decoding numerical values are unstable in matrix multiplication is effectively solved, the decoding accuracy is improved, and the Vandermonde matrix decoding method has the functions of fault tolerance and backward node improvement.

The invention relates to an azimuth uniform sampling implementation system and method for a multi-channel SAR (Synthetic Aperture Radar). The system is used for reconstructing a homogenized original received signal through an inverse filter, and a matrix inversion part realizes variable order Vandermonde matrix rapid inversion based on Lagrange interpolation through an FPGA (Field Programmable Gate Array); the variable-order Vandermonde matrix rapid inversion part comprises an element cache module, a first branch formed by a u matrix element calculation module and a v matrix element calculation module, a second branch formed by a pi vector and a reciprocal calculation module thereof, and a matrix multiplication module. According to the system, original receiving signals are reconstructed and homogenized through the inverse filter, azimuth uniform sampling of the multi-channel SAR is achieved, and for the inverse filtering matrix inversion part, variable-order Vandermonde matrix rapid inversion based on Lagrange interpolation and parallel operation of two branches are achieved through the FPGA, so operation efficiency can be improved, hardware resources are saved, and finally, high-precision Vandermonde matrix inversion operation under the conditions of low resources and low delay is realized.

The invention discloses a high-voltage circuit breaker mechanical life prediction method. The method comprises the following steps that: the failure rate of the accidental failure period of a high-voltage circuit breaker is described through an exponential distribution model, and a least square method is adopted to fit a polynomial model to replace the exponential distribution model; the historical data of the number of the times of switching off, switching off time, the number of the times of switching on and switching on time of the high-voltage circuit breaker are put into statistics, so that m groups of data (xi, yi) are obtained; the total variance of the m groups of data is obtained according to the polynomial model, a Vandermonde matrix is obtained according to the arrangement of points with the minimum variance, and the Vandermonde matrix is solved; solved data are substituted into the polynomial model, and a fitted curve of switching off / switching on time is solved; and the switching off time degradation curve and switching on time degradation curve of the high-voltage circuit breaker are drawn, and the operating mechanical service life of the high-voltage circuit breakercan be obtained according to the number of the times of the switching off of the high-voltage circuit breaker and the number of the times of the switching on of the high-voltage circuit breaker. Withthe high-voltage circuit breaker mechanical life prediction method adopted, the mechanical life of the high-voltage circuit breaker can be accurately predicted.

The embodiment of the invention provides a data packet transmission method, a sending end device and receiving end devices. The method comprises the following steps: after sending first batch of raw data packet to each receiving end device, receiving data packet loss information reported by each receiving end device; according to a lost packet set of each receiving end device, determining a total lost data packet set of all the receiving end devices; according to the total lost data packet set, determining the number of times for retransmitting a coded data packet; according to the number of times and the number of sent raw data packet, improving Vandermonde matrix to encode the coded data packet and determining the coded data packet retransmitted each time; and based on the determined coded data packet retransmitted each time, retransmitting corresponding coded data packet to each receiving end device when transmitting each time. By adopting the data packet transmission method, the sending end device and the receiving end device provided in the embodiment, the lost data packet can be retransmitted efficiently; and the timeliness and the reliability of the data transmission of a multicast communication system can be improved.

The invention discloses a data storage erasure method. The method comprises the following steps: dividing a data set in each disk into two data blocks; selecting each first data block from partial disks, selecting each second data block from the remaining disks, and constructing a first erasure Vandermonde matrix; dividing the preset line number by three, and rounding down to obtain a second numerical value; subtracting twice a second number from the preset line number to obtain a third value; using each residual data block to construct a first third numerical value line except the unit matrix in the second erasure Vandermonde matrix; selecting a part of data blocks from the first-round selected data blocks, and constructing a next second numerical value line by using the remaining data blocks and the second-round selected data blocks; using each remaining data block and each remaining data block in each round of selected data blocks to construct a remaining row; and performing data erasure by using the first erasure Vandermonde matrix and / or the second erasure Vandermonde matrix. According to the invention, the data erasure efficiency is improved. The invention further discloses a device, equipment and a storage medium, which have corresponding technical effects.

The invention discloses a solid state drive(SSD)-based file layout method in a large-scale storage system. According to the SSD-based file layout method, when a file is written into the storage system, a Vandermonde matrix is adopted to divide user data into n parts through the adoption of an asymmetric erasure code, the n parts of data is written on n SSDs, when the file is read to the storage system, according to arbitrary k parts (k is less than n) in the n parts data on the n SSDs, the Vandermonde matrix is used for calculating the whole file, wherein the k is the lowest quantity capable of recovering the user data, in addition, when the file is read, read requests are sent to the n SSDs, and the k parts of data returning in an earliest mode are used for recovering the data. If only garbage recovery is not carried out on the k parts of the n SSDs, the requests are free of influence of the garbage recovery. The SSD-based file layout method in the large-scale storage system has the advantages of being high in reliability, good in fault tolerance performance, long in service life of the SSD and low in influence of the SSD garbage recovery on the read requests.

The invention discloses an RAID model. The RAID model comprises an RAID core verification module and an RAID core scheduling module; the RAID core verification module adopts an Erasure code verification algorithm of RS code on the basis of a Vandermonde matrix, the Erasure code verification algorithm supports N data blocks to generate M verification data, and the RAID core scheduling module is used for conducting unified scheduling on all data reading and writing operations of the RAID model; the RAID core scheduling module selects N correct data blocks through a scheduling algorithm, and corresponding M verification data is calculated through the RAID core verification module; an RAID core I / O module is used for executing data reading and writing operations of the RAID; the RAID core scheduling module creates an object container containing all data. According to the RAID model, the RAID core scheduling module conducts unified scheduling on all the data reading and writing operations of the RAID, a user does not need to conduct caching for length adaptation, the verification number can be customized, no state exists for attitude to data, overall reconstruction is not needed, and the reading and writing efficiency is high.

The invention provides a universal EBR encoding method and a decoding method thereof, relates to an EBR encoding method and a decoding method thereof, and belongs to the technical field of distributedstorage systems. The universal EBR encoding method comprises the following step of encoding original k (p-1) tau information bits to generate a ptau * (k + r) matrix; the universal decoding method for EBR coding is based on an LU decomposition algorithm of a Van der Monte Carlo matrix. The invention aims to solve the problems that the selection of existing EBR coding parameters is limited, and adecoding method of the EBR coding parameters is high in calculation complexity and relatively low in decoding efficiency. The methods can be applied to a distributed storage system.