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293 results about "Synchronous frame" patented technology

A reference frame in which the time coordinate defines proper time for all co-moving observers is called "synchronous". It is built by choosing some constant time hypersurface as an origin, such that has in every point a normal along the time line (lies inside the light cone with an apex in that point); all interval elements on this hypersurface are space-like. A family of geodesics normal to this hypersurface are drawn and defined as the time coordinates with a beginning at the hypersurface.

System and method for generating multiple synchronized encoded representations of media data

The present invention provides a system and methods for producing multiple encoded representations of a video input sequence. The multiple representations produced each contain identified synchronization frames that allow a server and a client to switch between streamed representations in real time without interruption. Synchronization frames are frames of encoded video that can be independently decoded. A representation can thus be decoded starting at a synchronization frame. Each synchronization frame in one representation has a corresponding synchronization frame at a substantially similar temporal location in any other generated representation of the same video input sequence. The temporal co-location of synchronization frames in all representations facilitates the dynamic switching between representations during the streaming process. The present invention also provides a video encoder application that shares data during the encoding of multiple representations of a video input sequence by reusing data calculated in the encoding of one representation to encode other representations. The application can also generate the multiple encoded representations simultaneously.
Owner:CISCO SYSTEMS INC

Method for generating panoramic video according to multi-visual angle video stream

The invention discloses a method for forming a panoramic video based on multi-view video streaming, which comprises the following steps: 1) using a plurality of cameras to capture video with an omnidirectional coverage at different viewing angles; 2) establishing one-to-one correspondence of synchronous frames in each video streaming; 3) correcting each video streaming independently by the camera's calibration; 4) panoramically joining a group of the synchronous video frames and calculating the joint parameter of each frame; 5) applying the jointed parameter to the joint of each frame in each video streaming to obtain a panoramic video formed by the panoramic frames. Compared with the prior method that uses a concave lens or a convex lens to focus lights and then reduce into a panoramic video, the invention has the advantages of low cost, no picture distortion, and suitability for the shooting during movement.
Owner:ZHEJIANG UNIV

Method and apparatus for coexistence

A method for coexistence of an orthogonal frequency division multiple access (OFDMA) receiver (117) such as a WiMAX receiver with a synchronous frame-based transmitter (115) such as a Bluetooth transmitter within a mobile station (110) receives an estimated media access protocol (MAP′) signal indicating when a MAP message is expected to be received by the OFDMA receiver (117) and uses it at a Bluetooth shutdown signal (190) at least when a MAP message is expected to be received. The MAP′ signal can be taken directly from the ODFMA transceiver (117) or it may be produced through analysis of a receiver-enable (RXE) signal that includes not only MAP symbols but also downlink data symbols. The RXE signal can be analyzed using interrupt-and-timer, Fast Fourier Transform, covariance, and / or delay-locked loop techniques to extract historical MAP symbol information and generate expected MAP symbol information. Shutting down a Bluetooth transmitter during expected MAP message receipt permits the OFDMA receiver to maintain synchronicity with an access point while not requiring the Bluetooth transmitter to shut down every time the OFDMA receiver expects to receive an OFDMA symbol.
Owner:GOOGLE TECH HLDG LLC

Method for Synchronization and Data Transmission in a Multi-Hop Network

A method for synchronization and communication in a multi-hop network includes: transmitting a synchronization signal by a central node or a previously synchronized node, with a beacon slot assigned a beacon and the hop count value of the transmitting node transmitted in the frame of the synchronization signal, and, for all previously synchronized neighbor nodes of the transmitting node transmitting respective beacon slots and the hop count values in the frame of the synchronization; receiving by a first node the synchronization signal and the data transmitted in connection therewith; synchronizing the first node to the synchronization signal; detecting by the first node its neighbors and their respective beacon slot assignment and hop count values; determining the predecessor of the first node in the network by the first node in dependence of given criteria; storing by the first node the data received with the synchronization signal and data received in connection therewith and determined therefrom; and repetition the foregoing steps until synchronization of all the nodes.
Owner:FRAUNHOFER GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG EV

HDLC asynchronous to synchronous converter

Communication, using a synchronous protocol, over a synchronous communications link, between synchronous application programs executed on a terminal (i.e., personal computer, PC) with an asynchronous byte-oriented interface and a PC with a synchronous frame orientated interface is made possible by enhancing the PC with the asynchronous byte-oriented interface with a device which modifies the data to be transmitted by inserting framing flags and transparency characters before the data passes through the COMM port (asynchronous byte-oriented interface) and extracting the transparency characters after the data exits the COMM port. As a consequence, the PC with the frame-oriented interface does not have to be modified.
Owner:IBM CORP

Dual-CCD (Charge Coupled Device) scanning imaging detection method for continuous casting slab surface defects

The invention discloses a dual-CCD (Charge Coupled Device) scanning imaging detection method for continuous casting slab surface defects. The dual-CCD scanning imaging detection method comprises the following steps: (1) mounting a linear array CCD camera, an area array CCD camera and a linear laser transmitter on a continuous casting slab; (2) scanning by the linear array CCD camera and the area array CCD camera according to a synchronous frame frequency and line frequency manner to obtain a two-dimensional image and a three-dimensional image of the surface of the continuous casting slab; (3) registering the acquired two-dimensional image and three-dimensional image; and (4) carrying out information fusion processing on the registered two-dimensional image and three-dimensional image in one area on the surface of the continuous casting slab, analyzing area-of-interest features of the two images, and extracting a final area-of-interest to be identified on the surface of the continuous casting slab by combining the feature fusion processing result of the two images, thus reserving reliable defect information of the surface of the casting slab and detecting the surface defects of the continuous casting slab. According to the dual-CCD scanning imaging detection method provided by the invention, the structure is simple and convenient; the method is high in detection precision, great in real-time property and capable of automatically eliminating interference information.
Owner:CHONGQING UNIV

Clock synchronization method among wireless network devices

The invention provides a clock synchronization method among wireless network devices. The method comprises the steps that 1, a clock source device and at least one clock slave device are in network interconnection; 2, the clock source device obtains a reference clock, and the clock slave devices obtain unsynchronized reference clocks; 3, the clock source device interacts clock information with the clock slave devices through clock synchronization frames; 4, the clock source device transmits information containing the frequency and phase of the reference clock to the clock slave devices; the CPU processors in the clock slave devices calculate the reference clock of the clock source device and calibrate own reference clocks according to the reference clock; and the clock synchronization among the wireless network devices is realized through the steps. The synchronized reference clock can be used for synchronous scheduling of CPU system tasks, synchronous control of performance of instructions, high-precision synchronous measurement of external signals and synchronous measurement of high-speed moving objects, basic wireless take scheduling can be satisfied, and the synchronous awakening tasks of the devices in an ultra low-power-consumption application can be satisfied.
Owner:潘进

Method of configuring system layers for synchronous Ethernet

A method of configuring system layers for a synchronous Ethernet is provided. In the method, a physical layer takes charge of input and output of an Ethernet frame in direct relation to hardware, an xMII (x Media Independent Interface) layer connects the physical layer to a data link layer. The data link layer has a sync frame processor for processing a synchronous frame and an async frame processor for processing an asynchronous frame. A parser and multiplexer (MUX), included in the x MII layer, construct a super frame with a synchronous frame and an asynchronous frame, transmit the super frame through the physical layer, parse a received super frame into a synchronous frame and an asynchronous frame, and transmit the synchronous and asynchronous frames to the data link layer.
Owner:SAMSUNG ELECTRONICS CO LTD

Method for sending synchronization signals

The invention provides a method for sending synchronization signals. The method includes the steps that the synchronization signals of each sub-band are generated corresponding to each sub-band according to the ID of a cell and the serial number of a corresponding absolute sub-band of each sub-band, wherein the synchronization signals generated by the different sub-bands are mutually different; all points of the synchronization signals of each sub-band are mapped to the time-frequency resource positions of the synchronization signals of each sub-band where the pointes are located for transmitting, wherein time-frequency resources of the synchronization signals comprise all downlink resources on the whole sub-bands in a synchronization frame. By the application of the method for sending the synchronization signals, the peak-to-average ratio of time-domain signals can be reduced.
Owner:POTEVIO INFORMATION TECH

High-speed continuous variable quantum key distribution system and bit frame synchronization method thereof

The invention provides a high-speed continuous variable quantum key distribution system and a bit frame synchronization method thereof. The bit frame synchronization method comprises the following steps: Step one, a sender generates a set of special data used as a synchronous frame; Step two, the sender sends a coherent state to a receiver through a quantum channel; Step three, the receiver uses a balance homodyne detector to measure the displacement component of the coherent state; Step four, the receiver selects an appropriate alternate voltage determining threshold and a frame synchronization segment determining threshold to determine the synchronous frame according to structure information of the special data acquired through a classical channel in Step one; and Step five, synchronization fails if the receiver does not search the synchronous frame in the specified time, and the receiver needs to adjust the value of the alternate voltage determining threshold and the value of the frame synchronization segment determining threshold and reestablishes communication. According to the invention, the interference of external environmental factors to synchronization signals in the process of quantum key distribution can be effectively overcome, and synchronization between both sides of communication can be realized.
Owner:SHANGHAI JIAODA INTELLECTUAL PORPERTY MANAGEMENT CO LTD +1

Method of transmitting time-critical information in a synchronous ethernet system

A method of enabling transmission of a time-critical control signal event in a sync frame period, such as a pause signal that is generated when the receive buffer of an Ethernet switch is filled with packets beyond a threshold due to congestion of uplink asynchronous data, is disclosed. To transmit time-critical information in a synchronous Ethernet system, a current transmission period is checked upon detection of a time-critical event. If the current transmission period is a sync frame period, time-critical control information is generated, inserted into the first sub-sync frame after the time-critical event, and transmitted. If the current transmission period is an async frame period, a control frame including the time-critical control information is generated and transmitted.
Owner:SAMSUNG ELECTRONICS CO LTD

Enabling accurate demodulation of a DVD bit stream using devices including a SYNC window generator controlled by a read channel bit counter

A method of processing a DVD bitstream includes the steps of reading the DVD bitstream, the bitstream including a sync frame. A sync window is created, the sync window being open at least during the expected timing of a sync detection signal within the sync frame. The sync pattern is detected within the sync frame and the sync detection signal is generated only when the sync pattern has been detected and the sync window is open. A DVD sync pattern detection circuit includes a sync window generator to generate a sync window signal, a sync pattern detector, the sync pattern detector generating a sync detection signal only when both a sync pattern is detected in a DVD input stream and the sync window signal is asserted. A read channel bit counter generates a read counter signal to control the sync window generator, the read channel bit counter being reset when the sync pattern detector detects the sync pattern. The read channel bit counter controls the width of the sync window signals to allow the generation of correctly timed demodulation enable signals even when the sync frames have non-standard bit lengths. The sync windows also prevent the erroneous detection of sync patterns within the data portions of the sync frames. A pseudo sync detection signal is generated when the sync pattern is corrupted or missing from the sync frame.
Owner:CSR TECH INC

E1 link-based bidirectional time-frequency synchronous transmission method and master-slave device

The invention discloses an E1 link-based bidirectional time-frequency synchronous transmission method and a master-slave device, and relates to communication technology. The method comprises the following steps that: A, a master station transmits a time synchronous frame to a slave station, records a synchronous frame packet transmitting time stamp T1 and inserts the time stamp T1 into the synchronous frame; B, the slave station receives the synchronous frame from the master station, records a packet receiving time stamp T2 and acquires the time stamp T1 from the synchronous frame; C, the slave station transmits a time delay request frame to the master station and records the time stamp T3 for transmitting the time delay request frame; D, the master station receives the time delay request frame transmitted by the slave station and records the packet receiving time stamp T4, and the master station transmits the time stamp T4 to the slave station; and E, the slave station acquires the time stamp T4, calculates line loop time delay D, master-slave time deviation and frequency deviation according to the acquired time stamps T1 to T4 so as to adjust local time and clock frequency, wherein information in each step is encapsulated to be in an E1 frame format. The method and the device have the advantages of no need of protocol conversion or cache and low expenditure, so data transmitting and receiving time delay jitter can be greatly reduced.
Owner:电信科学技术第五研究所有限公司 +1

Anti-windup control for a current regulator of a pulse width modulation inverter

A control architecture for an electrical inverter includes a command limiter that is realized as a circular voltage limiter. The command limiter includes a Cartesian-to-polar converter coupled to a command source such as a synchronous frame current regulator. The Cartesian-to-polar converter provides magnitude and phase components for d-q command voltages. The command limiter further includes a magnitude limiter that limits the magnitude component to the maximum fundamental voltage component of the inverter, and a polar-to-Cartesian converter that converts the limited magnitude component and the phase component into modified d-q command voltages.
Owner:GM GLOBAL TECH OPERATIONS LLC

A multi-availability mechanism coexistence framework of concurrent storage system

This invention discloses a coexistence structure of a multi-use unit of a parallel storage system including a state test and control frame, a data service frame, a metadata service frame, a data synchronous frame, a customer end frame, a system management frame and a high usability module supporting load and unload of on-line modules, in which, the high usability module realizes that all frames call necessary interface functions in the mode of plug-in components and the frames call corresponding interfaces realized in the usable module based on the high usability kind used by logic data to finish specific function, and users can select the most suitable unit in the high usability unit to secure reliability and usability of logic data.
Owner:XI AN JIAOTONG UNIV +1

Image splicing method and system thereof

The embodiment of the invention provides an image splicing method and a system thereof; the image splicing method comprises the following steps: matching feature points are extracted from at least twopairs of synchronous frames, and the synchronous frame pairs are provided with an image overlapping region obtained by two different angles; homography matrix is solved according to the matching feature points; the homography matrix is applied to carry out image splicing to the synchronous frame pairs obtained by two different angles. In the embodiment of the invention, the matching feature points are extracted from a plurality of the synchronous frame pairs, so as to obtain a plurality of matching feature points, compared with the prior art, the matching feature points are extracted from a pair of the synchronous frame pairs, the method in the invention has representativeness, and the obtained homography matrix is reliable and accurate, thereby obtaining better image splicing effect.
Owner:GLOBAL INNOVATION AGGREGATORS LLC

Syncronizing wireless devices

ActiveUS20120188998A1Sufficient frame densityReduce network communication protocol efficiencySynchronisation arrangementNetwork traffic/resource managementSynchronous frameClock synchronization
A method of synchronising the reference clock of a first wireless device with a master reference clock of a second wireless device via a wireless network. The method involves transmitting, from the second wireless device to the first wireless device, a dedicated synchronisation frame via a dedicated synchronisation channel; receiving the dedicated synchronisation frame at the first wireless device; and synchronising the reference clock of the first wireless device with the master reference clock of the second wireless device based on the received dedicated synchronisation frame.
Owner:NXP BV

Synchronous clawing mechanism with multiple manipulators

The invention relates to a synchronous clawing mechanism with multiple manipulators, and belongs to the field of automation equipment. The synchronous clawing mechanism with multiple manipulators comprises a synchronous manipulator-clawing platform, a synchronous frame vertical-lifting platform and synchronous frame transverse-moving platforms. The synchronous clawing mechanism with multiple manipulators is characterized in that the synchronous manipulator-clawing platform is fixed on the synchronous frame vertical-lifting platform via a rodless air cylinder slider and linear guide-way sliders, and upper ends and lower ends of linear guide-ways of the synchronous frame vertical-lifting platform are fixed on the synchronous frame vertical-lifting platform. Clawing of the manipulators to targeted objects is realized via the synchronous manipulator-clawing platform. Targeted object grabbing and disposing of the manipulators is realized via the synchronous frame vertical-lifting platform. Transverse moving transfers of the targeted objects by the manipulators are realized by the synchronous frame transverse-moving platforms. The synchronous clawing mechanism with the multiple manipulators has the advantages that machines can be utilized to substitute for manual operation, and a plurality of the targeted objects can be clawed synchronously automatically. Furthermore, the synchronous clawing mechanism with the multiple manipulators is simple in structure, convenient, practical, environment-friendly, energy-saving, high in degree of automation, and reliable in performance.
Owner:BEIJING UNIV OF TECH

Monitoring and evaluating the production of a conversion facility

The disclosure provides a system and method for monitoring and evaluating a conversion facility. The method includes storing values for quantitative variables and / or cost variables associated with processes performed at the conversion facility. The method includes receives a syncing frame, wherein the syncing frame embraces values for the quantitative variables and / or the cost variables stored less than thirty days prior to receiving the syncing time frame. The method includes determining, from the stored values for at least one set of values for at least one of the variables that are within the syncing frame. The method also includes calculating a cost of processing a commodity processed at the conversion facility for the syncing frame using the first and second set of values.
Owner:ACCENTURE GLOBAL SERVICES LTD

Current regulator and current control method and system for ac motors

Methods and systems are provided for controlling an AC motor via an inverter. The method includes determining a delay-compensated offset based on a synchronous frame current, producing a current error based on a synchronous frame current and a commanded current, producing a voltage error based on an anti-windup offset and the current error, producing a commanded voltage based on the delay-compensated offset and the voltage error, and providing the inverter with the commanded voltage.
Owner:GM GLOBAL TECH OPERATIONS LLC +2

Method and apparatus for digital data synchronization

Synchronization and desynchronization of a data signal transported in a synchronous frame across a synchronous communications network, such as SONET / SDH, reduces waiting-time jitter. A timing estimate (F) indicative of a relationship between a data rate (f1) of the data signal and a reference frequency (f2) of the synchronous communications network is calculated and communicated through the synchronous communications network, for example in the Synchronous Payload Envelope of a SONET frame. The data signal is recovered using a desynchronizer Phase-Locked Loop steered by the timing estimate (F). The timing estimate (F) can be any one or more of: a ratio between the data rate (f1) and the reference frequency (f2); a difference between the data rate (f1) and the reference frequency (f2); and a phase difference between a recovered data clock signal associated with the data rate (f1) and a reference clock signal associated with the reference frequency (f2).
Owner:CIENA

TDMA based long propagation delay wireless link time slot distribution method

The invention discloses a TDMA based long propagation delay wireless link time slot distribution method which is mainly used for solving the problem of low throughput rate and low channel utilization rate of an existing long propagation delay wireless ad hoc network. The implementation scheme comprises the steps of 1, initializing a node; 2, judging whether the node receives a synchronous frame, if so, carrying out network access synchronization by the node, and otherwise, building a network by regarding the local clock as a reference by the node; 3, after synchronization is finished, generating a super-frame structure automatically by the node, and dividing the local time into multiple time slots with different functions; and 4, judging whether the current time slot is a service time slot by the node, if so, sending and receiving data, and otherwise, updating network information. as the TDMA is adopted as a channel access mode, the node can access the channel without any conflict; and through an interactive sending mechanism and a data frame queue scheduling mechanism, the network throughput rate and the channel utilization rate are increased, the queuing delay of the data frames is reduced; and the TDMA based long propagation delay wireless link time slot distribution method can be used for a time division multiple access ad hoc network.
Owner:XIDIAN UNIV

Method and apparatus for coexistence

A method for coexistence of an orthogonal frequency division multiple access (OFDMA) receiver (117) such as a WiMAX receiver with a synchronous frame-based transmitter (115) such as a Bluetooth transmitter within a mobile station (110) receives an estimated media access protocol (MAP′) signal indicating when a MAP message is expected to be received by the OFDMA receiver (117) and uses it at a Bluetooth shutdown signal (190) at least when a MAP message is expected to be received. The MAP′ signal can be taken directly from the ODFMA transceiver (117) or it may be produced through analysis of a receiver-enable (RXE) signal that includes not only MAP symbols but also downlink data symbols. The RXE signal can be analyzed using interrupt-and-timer, Fast Fourier Transform, covariance, and / or delay-locked loop techniques to extract historical MAP symbol information and generate expected MAP symbol information. Shutting down a Bluetooth transmitter during expected MAP message receipt permits the OFDMA receiver to maintain synchronicity with an access point while not requiring the Bluetooth transmitter to shut down every time the OFDMA receiver expects to receive an OFDMA symbol.
Owner:GOOGLE TECH HLDG LLC

Method for synchronous frame transmitting on IP network and network apparatus for transmission

Network equipment at sending end packs several data frames received early or late into IP data packet, and sends the IP data packet to network equipment at receiving end through IP network. Data frame in IP data packet stores recorded timestamp of transmission time difference between adjacent data frames. Based on comparison between time interval of data frame received successively and data frame stored timestamp, the network equipment at receiving end determines whether the received IP data packet is transmitted out. Moreover, through types, sequence number id in IP data packet, the method determines whether reception is correct in order to decide whether to ask the sending end to do retransfer. Features are: realizing synchronous transmission of data frame, increasing use ratio of bandwidth, and raising transmission efficiency.
Owner:NEW H3C TECH CO LTD

Optical disk device

An LPP detection unit detects an LPP from a wobble signal. A correction unit obtains a difference set by performing processing of calculating a difference in signal level between an LPP-present sync pattern portion and a non-LPP sync pattern portion having the same polarity, and executes correction on an RF signal at a timing when the LPP is detected, by using the difference set. The LPP-present sync pattern portion is a sync pattern portion obtained when the LPP is detected at the timing of the sync pattern portion positioned at the head of a sync frame of the RF signal. The non-LPP sync pattern portion is a sync pattern portion obtained when no LPP is detected at the timing of the sync pattern portion of the sync frame. In the case of reproducing information recorded on a DVD-R / RW optical disk, the occurrence of errors due to the effect of the LPP can be reduced.
Owner:RENESAS ELECTRONICS CORP

Open loop time delivering method

InactiveCN1819579AReduce loadAchieving Time Synchronization AccuracyData switching networksSynchronising arrangementTime deviationTime delays
The technical scheme is: a unified system is composed of multi time transfer chains; each time transfer chain consists of a master node, several switches and a slave node; SMAC are located in each switch and node; SMAC in master node generates synchronous frame, and broadcasts it to SMAC in slave node through the time transfer chain; the time transfer chain measures path time delay generated from transmission from SMAC in master node to SMAC in slave node; the path time delay is composed of the time delay of each chain and the time delay of each switch; the chain time delay is measured by using a measuring frame to take measurement at time of building a connection between a pair of SMAC; the switch time delay is measured by using a synchronous frame to take real-time measurement; the SMAC in slave node figures out its time warping with master node to implement correction of slave node time.
Owner:NAT UNIV OF DEFENSE TECH

A baseband data transmission apparatus and frame synchronization method thereof

The invention relates to a base band data transmission installation and its frame synchronization method. It includes framing machine, serializer, deserialiser, deframing machine, synchronizing frame inserting controller. The serializer and the deserialiser are physically connected by low pressure high speed differential line. The framing machine is used to form the user data to user data frame with the same length. Meanwhile, the synchronizing frame inserting controller inserted synchronizing frame to free frame position periodically, the user data frame and the synchronizing frame are formed to parallel data. The serializer transforms the parallel data after framing to serial data by coding, and transforms to differential signal and transmits out by the low pressure high speed differential line. After the deserialiser transforms the received differential signal to single end signal, the serial data will be transformed to parallel data. The deframing machine finds the frame boundary according to the frame synchronization information contained in the received parallel data, then, each of the received frame data will be distributed to the after stage unit to use. The advantage of the installation and method of the invention is that the band width took up is small, the transmission efficiency is high, and the cost of the frame synchronization is reduced.
Owner:晋江市高新技术开发办公室

Method of synchronization of wireless sensing network node

A wireless sensing network is a network structure comprising many nodes communicating with each other by wireless radio frequency mode; most of the nodes in the wireless sensing network are supplied power by cell; so the power consumption management of node is an important problem in wireless sensing network design. A radical solution to the problem is to make the nodes in sleep state with low power consumption in most time; and the node in sleep state must be able to wake synchronously to accomplish network function. The algorithm provides a synchronous mechanism, which comprises: a synchronizer exists in network for sending a synchronous frame; the synchronous frame is forwarded step by step by routers in the network to all the nodes; and the nodes in the network obtains the consistent clocks by using the synchronous frame and the synchronizer. By applying the mechanism described in the algorithm, almost all the nodes in a wireless sensing network can be supplied power by cell and can sleep periodically.
Owner:吴鑫 +2

Anti-windup control for a current regulator of a pulse width modulation inverter

A control architecture for an electrical inverter includes a command limiter that is realized as a circular voltage limiter. The command limiter includes a Cartesian-to-polar converter coupled to a command source such as a synchronous frame current regulator. The Cartesian-to-polar converter provides magnitude and phase components for d-q command voltages. The command limiter further includes a magnitude limiter that limits the magnitude component to the maximum fundamental voltage component of the inverter, and a polar-to-Cartesian converter that converts the limited magnitude component and the phase component into modified d-q command voltages.
Owner:GM GLOBAL TECH OPERATIONS LLC
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