The invention discloses a CICQ structure crossbuffer queue balance packet scheduling algorithm. According to the CICQ structure crossbuffer queue balance packet scheduling algorithm, making a switch work in a work-conserving state as a core is realized or is approached to a maximum degree, output ports are taken as matching reference, output ports having smallest crossbuffer queue length are selected for priority matching, crossbuffer packet occupation of all output ports is balanced, so working in the work-conserving state is made to realize or approach to a maximum degree, the passing percentage is improved, and average packet time delay is further reduced. As is shown in simulation result comparison, for the CICQ switch with crossbuffer as one packet, the algorithm is better than known mainstream algorithms in the average packet time delay, and excellent practical values in large-scale high performance CICQ switches are realized.