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A Packet Scheduling Algorithm for Cicq Structured Cross Buffer Queue Balance

A technology of cross-buffering and scheduling methods, applied in data exchange networks, digital transmission systems, electrical components, etc., can solve the problems of no practical value and limited scalability, achieve good practical value, improve the pass rate, switch The effect of pass rate and packet average delay performance advantage

Inactive Publication Date: 2018-04-06
BEIHANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the high speedup ratio of the OQ structure limits its scalability and is not practical in large-scale high-speed switching.

Method used

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  • A Packet Scheduling Algorithm for Cicq Structured Cross Buffer Queue Balance
  • A Packet Scheduling Algorithm for Cicq Structured Cross Buffer Queue Balance
  • A Packet Scheduling Algorithm for Cicq Structured Cross Buffer Queue Balance

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028] figure 1 A block diagram of a CICQ structured packet switch is given. The present invention balances the captains of each output cross-buffer queue (indicated by the bold vertical line in the figure) through scheduling, so as to realize work-conserving as much as possible and improve the average delay performance under the premise of ensuring the pass rate.

[0029] The first step is initialization;

[0030] Initialize the port set. At the beginning of each time slot, let the set of output ports OP include all output ports and the set of input ports IP include all input ports. For example, at the beginning of a time slot on a 4×4 port, the VOQ at the input end and the buffer status in the crossbar are as follows:

[0031]

[0032] where VOQ ij Represents the VOQ queue in which packets from input port i to output port j are queued, 0 means it is empty, 1 means it is not empty; CB ij Represents the crossbuffer corresponding to the input and output port pair ij, an...

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Abstract

The invention discloses a CICQ structure crossbuffer queue balance packet scheduling algorithm. According to the CICQ structure crossbuffer queue balance packet scheduling algorithm, making a switch work in a work-conserving state as a core is realized or is approached to a maximum degree, output ports are taken as matching reference, output ports having smallest crossbuffer queue length are selected for priority matching, crossbuffer packet occupation of all output ports is balanced, so working in the work-conserving state is made to realize or approach to a maximum degree, the passing percentage is improved, and average packet time delay is further reduced. As is shown in simulation result comparison, for the CICQ switch with crossbuffer as one packet, the algorithm is better than known mainstream algorithms in the average packet time delay, and excellent practical values in large-scale high performance CICQ switches are realized.

Description

technical field [0001] The invention belongs to the technical field of high-performance packet switch control. Background technique [0002] So far, people have done a lot of research on the scheduling algorithm of the high-performance Combined Input and Crossbar Queued (CICQ) structure. The classic mainstream algorithms are divided into round-robin RR (Round-Robin) and maximum weight matching There are two types of algorithms. RR-based algorithms mainly include RR-RR, DRR (Differential Round-Robin), TFQA (Tracking Fair QuotaAllocation), RR-LQD (LongestQueue Detecting), etc. The weight-based maximum matching method mainly includes the maximum weight matching method with the captain, cross buffer occupancy rate, and blocking time as the weight, including LQF-RR (Longest Queue First and RR), MCBF (MostCritical Buffer First), SCBF (Shortest Crosspoint Buffer First), SBF-GWF (theShortest buffer First and the Greatest Weigh buffer First), HOPS (HybridOptimization Packet Schedul...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/863
CPCH04L47/50
Inventor 熊庆旭张元昊
Owner BEIHANG UNIV
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