The invention discloses a smooth narrow pulse compensating method of an FPGA (field programmable gate array) in a frequency converter, which comprises the steps as follows: judging whether an input modulating wave is a narrow pulse, if not, outputting the waveform, and if the value is stored in a narrow pulse register, not generating a waveform currently; inputting the modulating wave again, and judging whether the value is a narrow pulse, if not, outputting the waveform, if yes, accumulating the value; judging whether the sum of accumulated values is larger than or equal to the narrow pulse upper limit, if yes, outputting the waveform; and if the modulating wave is a narrow pulse, and the sum of accumulated values of the narrow pulse register is smaller than the narrow pulse upper limit, accumulating the current value in the narrow pulse register, and not outputting the wave. By taking the measure, an additional hardware circuit is not needed, thus being capable of guaranteeing smooth waveforms to be output at a position of a sinusoidal wave at which a narrow pulse is generated, effectively reducing the switching frequency of a power device, the heat generated by the device and harmonic content of the system, increasing the effective output level of the device, and improving the efficiency of the whole system.