The invention provides an integrated
chip and a test method thereof, and relates to the technical field of integrated circuits. The
integrated circuit comprises a
low speed universal interface, an eFPGA (e-Field-Programmable
Gate Array) circuit and at least one functional circuit; the
low speed universal interface is connected with the eFPGA circuit, and the eFPGA circuit is connected with each functional circuit; the
low speed universal interface is used for receiving a test file transmitted by an external intelligent terminal, and transmitting the test file to the eFPGA circuit; the eFPGA circuit is used for acquiring a test
signal of a target functional circuit based on the received test file, and feeding the acquired test
signal back to the low speed universal interface; and the low speed universal interface is further used for transmitting the received test
signal to the intelligent terminal, so that the intelligent terminal obtains a functional test result of the target functional circuit. The integrated
chip provided by the invention can effectively reduce the number of IO interfaces required by the functional test, and can also effectively alleviate the limitation of the
chip signal rate on the functional test.