52results about How to "Does not affect correctness" patented technology

The invention discloses short-distance measurement method and structure of the grounding resistance of a grounding network. A current pole used for measuring the grounding resistance of the grounding network is arranged near the grounding network to be measured, even inside the grounding network; the current pole is used as a small grounding network to be measured, and the grounding resistance R pole of the current pole is measured by the traditional long-distance measuring method; finally, a test voltage is applied between the grounding networking to be measured and the current electrode, a test current between the grounding network to be measured and the current pole is measured by an ampere meter, and the total grounding resistance R (total) of the grounding network to be measured and the current pole is calculated by using the Ohm's law; and the grounding resistance R pole of the current pole is subtracted from the R (total) to obtain the grounding resistance R (network) of the grounding network to be measured. The invention not only can avoid the problems of long wire pay-off distance, large work load, easy interference production and the like, but also can avoid the technical difficulty that the measurement precision of the traditional short-distance measurement method can not satisfy actual requirements.

A communication data packet error correction method and device, the communication data packet includes an initial data packet and an error correction data packet, wherein the initial data packet includes N initial data blocks, and the N initial data blocks include N-1 first A valid data block and a first verification data block, the error correction data packet includes N error correction data blocks corresponding to the N initial data blocks one by one, and the receiving end performs a check on the first valid data block according to the first verification data block The first verification operation, if the first verification is correct, then process the first valid data block, otherwise, the receiving end performs error correction operation on the initial data packet according to the error correction data packet to obtain the correction data packet, the correction data The packet includes N-1 second valid data blocks and a second verification data block, and the receiving end performs a second verification operation on the second valid data block according to the second verification data block, and if the second verification is correct, then Process the second valid data block; otherwise, the receiving end discards and requests to resend the communication data packet.

The invention provides a method of processing embedded information in paper medium file, comprising the steps of: reading the to-be-embedded information, RS coding the information, converting the paper medium file into image data, configuring the halftone screen coding, arranged into two-dimensional distribution at certain interval, at the interval of a print image, forming shading of the print image, composing the print image of the embedded information; printing and outputting the print image of the embedded information, or outputting the printing plate-making data for plate-making, and printing the print image of the embedded information. The method can directly embed much information on the paper medium file and can be used in the fields of automatically reading the paper medium file, and anti-fake of certificates, production and management of classified documents.

The invention provides a synthetic aperture radar control interface network which comprises a plurality of control interface nodes and transmission media used for connecting the control interface nodes into a ring topology network. The control interface nodes comprise a main node and a plurality of secondary nodes, wherein the main node adopts a network interface chip as an input and output interface. The main node is used for starting and ending control information data packages. The control information data packages are sequentially transmitted in the control interface nodes of the ring topology network and comprise information sessions corresponding to the secondary nodes. The information sessions comprise control instructions controlling the secondary nodes. The secondary nodes are used for receiving the control information data packages and analyzing the control instructions corresponding to the secondary nodes from the information sessions, corresponding to the secondary nodes, of the control information data packages. The synthetic aperture radar control interface network has the advantages of being high in speed, efficiency and reliability, and enhancing the maintainability.

The invention provides a formal verification method for a security protocol, which comprises the following steps of: 1) giving the security protocol under a set network environment; 2) layering the security protocol according to functions realized by an execution step of the security protocol; 3) decomposing an expected security goal into subgoals corresponding to sublayers; 4) modeling each sublayer in turn and describing each subgoal; and 5) respectively verifying whether layering models constructed in the step 4) meet the subgoals corresponding to the layering models or not, and if so, finishing the verification of the security protocol. By combining a layering method with a model checking scheme, dividing the security protocol into clearly layered modules and verifying the modules respectively, the complexity of accurate modeling is reduced; and on the premise of not influencing the correctness of a verification result, the scale of a state space in the checking process is greatlyreduced.

The invention relates to a non-volatile memory structure, which includes a substrate, a stacked gate structure and a source / drain region. Wherein, the stacked gate structure is located on the substrate, the source / drain regions are located in the substrate on both sides of the stacked gate structure, and there is a vertical step channel doping profile in the substrate. This vertical step channel doping profile is divided into a first doping region under the surface of the substrate, and a second doping region located under the first doping region and adjacent to the first doping region, wherein the concentration of the second doping region is higher than the first doped region.

The invention discloses a method for achieving the concurrent process of buffer data accessing and loading, which comprises using two data buffer areas to store data, wherein either of the data buffer areas is in an accessing state, and the other is in a wait state, using a data loading pointer and a data visiting pointer to point for the two data buffer areas, using the data loading pointer to point for the data buffer area in the wait state when loading for buffer data, and loading buffer data, and simultaneously using the data visit pointer to point the data buffer area in the accessing state if buffer data are needed to be accessed, and accessing buffer data. Data can be accessed when loading data according to the method without influencing the accuracy of accessing data, and the speed of accessing data can be improved.