39 results about "Library design" patented technology

Computer-implemented methods, programs and apparatus for generating a library design for a combinatorial library of materials. A library design includes a set of sources representing components to be used in preparing the combinatorial library, destinations representing arrangements of cells and mappings, defining one or more distribution patterns for assigning components to cells in the destination arrangement or arrangements. Mappings include gradients and sets of user-defined equations, and are used to calculate the amount of one or more components to be assigned to a cell or cells in an arrangement. A library design can also include one or more process parameters defined to vary over time or across a plurality of destination cells. The invention outputs a data file defining the library design, including electronic data representing the sources, the destinations and the mapping, in a format suitable for implementing manually or using automated material handling apparatus.

The invention provides an interactive-interface fast implementation method based on a reusable library. The interactive-interface fast implementation method comprises correlating data and interface elements by virtue of active data / view model design, constructing a reusable basic element library, a universal function library and a special function library according to the characteristics of an interactive interface and then constructing a reusable library, and finally raising model into-library standard specifications, thereby providing a unified standard interface a configuration path, a database table from and a data / view model binding specification. The method is suitable for a development platform based on remote access of WEB and based on local interactive interfaces of tools such as QT and VS; the method is capable of realizing various types of interfaces needing to be interacted based on the reusable library, and has the characteristics of simple function library design rule, high reusability, quick interface molding and the like; besides, the effectiveness of the reusable library and the usability of the interactive interfaces can be further improved by improving and optimizing the standard specifications of the reusable library.

A method of generating an area efficient power switch cell includes receiving, by a cell library design tool, a specification of a power switch circuit to be established as a power switch cell in a cell library. The cell library design tool also receives one or more attributes of the power switch cell including a height of the cell boundary and receiving, by the cell library design tool, a layout placement constraint requiring the power switch cell to be placed in a semiconductor layout so as to bridge two parallel rows of doped wells. The parallel rows of doped wells are interleaved with doped substrate and the doping of the wells is of a different type than that of the substrate. Based on the specification of the power switch circuit, the one or more attributes, and the layout placement constraint, the cell library design tool generates the power switch cell.

A method for partitioning a molecular subset is described. The partitioning method takes into account molecular structure and its manner of storage and transmission, transformations to be applied to the molecular subset and their implementation, and constraints imposed by the implementation of the partitioning method. Using this method, a molecular subset can be stored, transmitted, and processed more efficiently. The resulting efficiency makes it possible to design and run applications which require complex molecular processing, such as rational drug discovery, virtual library design, etc.

The invention discloses a method for designing a complementary data redundancy structure type CMOS (Complementary Metal Oxide Semiconductor) standard cell circuit physical library model. The method comprises the steps as follows: according to a cell library design flow, finishing the design of a cell circuit diagram and a layout with isolated input and output signals of a PMOS (P-channel Metal Oxide Semiconductor) network and an NMOS (N-channel Metal Oxide Semiconductor) network; virtually connecting the input and output ports of the PMOS network and the NMOS network in the circuit diagram and the layout respectively through auxiliary lines and auxiliary layers; designing a circuit diagram and a layout with functions of not distinguishing the input and output ports of the PMOS network and the NMOS network; and according to the method for designing the physical library model, extracting from the layout added with auxiliary connections to obtain the physical library model satisfying the EDA (Electronic Design Automation) tool format requirements, and setting special grid points and special wiring tracks in technology files at the same time. According to the method, the ultra-large-scale integrated circuit designed by adopting the complementary data redundancy structure type CMOS can be finished by using the semi-custom design based on the standard cell, so that the design efficiency of the circuit is improved.