689 results about "Flying capacitor" patented technology

An integrated circuit regulates current flowing from a battery to a load without requiring an external current sense resistor. The IC includes a primary charge pump; a model charge pump; a current sense circuit, a first control circuit to force a voltage level at the output of the model charge pump to be equal to a voltage level at the output of the primary charge pump; and, a second control circuit to force a model current put out by the model charge pump to be equal to a reference current. Current passing through the primary charge pump is regulated at a level established by the capacitance value of an external flying capacitor irrespective of input voltage variation of the battery power source.

An electro-active lens is disclosed. The lens includes at least one electro-active cell to provide a lens having at least two focal lengths, the electro-active cell capable of adjusting its focal length based on voltages applied to the electro-active cell. The voltage is supplied by an alternating current source, including a flying capacitor circuit. The electro-active lenses reduce birefringence through the use of a single cholesteric liquid crystal electro-active cell.

A voltage converter including a capacitive voltage divider combined with a buck converter and battery charger. The converter includes four capacitors, a switch circuit, an inductor and a controller. The capacitors form a capacitor loop between an input node and a reference node and include a fly capacitor controlled by the switch circuit, which is controlled by a PWM signal to half the input voltage to provide a first output voltage on a first output node, and to convert the first output voltage to the second output voltage via the inductor. The controller controls the PWM signal to regulate the second output voltage, and provides a voltage control signal to control the input voltage to maintain the first output node between a predetermined minimum and maximum battery voltage levels. A battery charge path is coupled to the reference node and battery charge mode depends upon the battery voltage.

Continuous linear regulated zero dropout charge pump with high efficiency load predictive clocking scheme AND method. The method of pumping charge includes amplifying the difference between a feedback signal from the charge pump output and a reference, and alternately switching between: a) coupling a first flying capacitor between first and second power supply terminals, and coupling a second flying capacitor between the amplified difference and the charge pump output; and b), coupling the second flying capacitor between first and second power supply terminals, and coupling the first flying capacitor between the amplified difference and the charge pump output. Preferably the switching is done before the amplifier saturates. Various alternate embodiments and method and apparatus for starting the charge pump are described.

A single-phase hybrid multilevel inverter is described that combines a 3-level leg and a 2-level leg to reduce the number of overall switching devices for a 5-level inverter. The 2-level inverter leg switches at a fundamental frequency and the 3-level flying capacitor leg uses PWM modulation to switch resulting in a low THD output voltage spectrum. The control method developed for the single-phase inverter is used to build a three-phase inverter comprised of three single-phase hybrid inverters in order to achieve a line-to-neutral voltage having five levels and a line-to-line voltage having nine levels.

A charge pump circuit is provided. The charge pump circuit includes a pump unit, first through sixth switches, a fly capacitor and an output capacitor. In a first period, an input voltage and a first voltage charge at least one internal capacitor of the pump unit via a first terminal and a second terminal of the pump unit. In the second period, the internal capacitor of the pump unit provides charges to the fly capacitor via the second switch and generates a first output voltage. In the third period, the fly capacitor supplies the charges to the output capacitor via the fourth switch to generate a second output voltage.

A multiple output DC-to-DC voltage converter using a new time-multiplexed-capacitor converter algorithm and related circuit topologies is herein disclosed. One embodiment of this invention includes a flying capacitor, a first output node, a second output node, and a switching network. The switching network configured to provide the following modes of circuit operation: 1) a first mode where the positive electrode of the flying capacitor is connected to an input voltage and the negative electrode of the flying capacitor is connected to ground; 2) a second mode where the negative electrode of the flying capacitor is connected to the input voltage and the positive electrode of the flying capacitor is connected to the first output node; and 3) a third mode where the positive electrode of the flying capacitor is connected to ground and the negative electrode of the flying capacitor is connected to the second output node.

Systems and methods for supplying power (both active and reactive) at a medium voltage from a DCSTATCOM to an IT load without using a transformer are disclosed. The DCSTATCOM includes an energy storage device, a two-stage DC-DC converter, and a multi-level inverter, each of which are electrically coupled to a common negative bus. The DC-DC converter may include two stages in a bidirectional configuration. One stage of the DC-DC converter uses a flying capacitor topology. The voltages across the capacitors of the flying capacitor topology are balanced and switching losses are minimized by fixed duty cycle operation. The DC-DC converter generates a high DC voltage from a low or high voltage energy storage device such as batteries and / or ultra-capacitors. The multi-level, neutral point, diode-clamped inverter converts the high DC voltage into a medium AC voltage using a space vector pulse width modulation (SVPWM) technique.

A switched-capacitor voltage converter which is particularly well-suited for receiving a line voltage from which to drive current through a series of light emitting diodes (LEDs). Input voltage is rectified in a multi-level rectifier network having switched capacitors in an ascending-bank configuration for passing voltages in uniform steps between zero volts up to full received voltage VDC. A regulator section, operating on VDC, comprises switched-capacitor stages of H-bridge switching and flying capacitors. A current controlled oscillator drives the states of the switched-capacitor stages and changes its frequency to maintain a constant current to the load. Embodiments are described for isolating the load from the mains, utilizing an LC tank circuit or a multi-primary-winding transformer.

A low noise charge pump circuit includes a first terminal of a first flying capacitor selectively coupled to a first voltage during a first recharging phase and a second terminal of the first flying capacitor selectively coupled to a second voltage during the first recharging phase. The second terminal of the first flying capacitor is coupled to a precharge control circuit during a first parasitic capacitance precharging phase that occurs after the first recharging phase to cause the voltage of the first terminal of the first flying capacitor to equal an output voltage. The first terminal of the first flying capacitor is coupled to an output conductor conducting the output voltage during a first discharging phase that occurs after the first parasitic capacitance precharging phase. The second terminal of the first flying capacitor is coupled to a discharge control circuit which increases the voltage of the second terminal of the first flying capacitor during the first discharging phase until the output voltage is equal to a regulated value.

The invention provides a boosting power converting circuit and a control method. The circuit comprises N first switch modules, N second switch modules, N-1 third switch modules, N-1 flying capacitors and N-1 pre-charging units, wherein the N second switch modules are serially connected with an inductor and an input power supply so as to form a loop; N first switch modules are serially connected with a load, the inductor and the input power supply so as to form the loop; the flying capacitors and the third switch modules are connected between the first public points which are between the first switch module and the first switch module and the second public points which are between the second switch module and the second switch module; each of the flying capacitors is in parallel connection with each of the pre-charging units; each of the pre-charging units is used for pre-charging each of the flying capacitors and guaranteeing the voltage of each flying capacitor not below 0V when the third switch modules connected with the flying capacitors in parallel connection with the pre-charging units are switched off and the voltages of the flying capacitors are less than a preset threshold value, so that the problem of possibly breaking down the semiconductor device through overvoltage when the boosting power converting circuit is used in a boosting system is avoided.

Microelectromechanical (MEMS) switches are used to implement a flying capacitor circuit transferring of electrical power while preserving electrical isolation for size critical applications where transformers or coupling capacitors would not be practical. In one embodiment, the invention may be used to provide input circuits that present a programmable input impedance. The circuit may be modified to provide for power regulation.

A method of operating a flying capacitor multilevel converter having a direct current link and a plurality of phase legs each having a plurality of flying capacitors includes employing redundant states to balance flying capacitor voltages by charging or discharging flying capacitors. The redundant states are employed by obtaining a load current of the flying capacitor multilevel converter. If a load current value is lower than a threshold value then a capacitor current of a phase terminal capacitor is utilized to determine redundant states else a load current direction is utilized to determine the redundant states.

The invention relates to an energy transfer type power battery quick balancing system and a control method thereof. The invention relates to the battery voltage balancing system and further relates to the control method of battery pack quick balancing process, which solves the problem that a balanced battery single body and an energy storing element are impacted through pulse current by a currentbalancer in the prior art. The system comprises a power battery pack single body battery voltage and flying capacitor voltage detecting network, a current sensor and a signal modulating circuit, a single chip microcomputer, an electric power transfer channel, a first filter circuit, a two-way buck-boost converter, a second filter circuit and a flying capacitor. After starting to work, the system firstly detects the battery pack single body battery voltage, the flying capacitor voltage and the charging / discharging current; and if the dropout voltage between the highest voltage of the battery single body and the lowest voltage of the single body exceeds a set value, the balancing operation is started.

Systems and methods to achieve a charge pump for generating from single supply voltage energy efficient supply voltages that are symmetrical around ground voltage have been disclosed. The charge pump requires two flying capacitors only. The charge pump generates positive and negative supply voltages following a 1 / N ratio of Vdd voltage, i.e. +−Vdd / N, and can be generalized to generate + / −Vdd / 2N voltages. This is especially useful for supplying class-G amplifiers.

A voltage detecting apparatus for a combination battery includes a multiplexer type flying capacitor voltage detecting circuit, a synchronous control type A / D converter, and a battery controller. The battery controller has a timing table to regulate generation timings of a switching control signal, an activation signal, and a transfer command signal on a common time axis. The timing control is carried out by outputting the switching control signal, the activation signal, and the transfer command signal to the flying capacitor voltage detecting circuit, the A / D converter, and the battery controller at the timing regulated in the timing table and according to an order memorized in the timing table.

A system and method for measuring voltage of individual cells connected in series includes a single flying capacitor. The capacitor stores the charge of one of the cells such that a primary analog-to-digital converter (ADC) connected to the capacitor may process a representation of the voltage of the cell being measured. A secondary ADC is connected directly to the cell being measured. The measurements of the primary and secondary ADCs are then compared to verify the accuracy of the flying capacitor.

A system and method for measuring voltage of individual cells connected in series includes a single flying capacitor. The capacitor stores the charge of one of the cells such that an analog-to-digital converter (ADC) connected to the capacitor may process an accurate representation of the voltage of the cell being measured. A plurality of switches electrically connects and disconnects the cells from the capacitor. A controller is in communication with the ADC and the switches for sequencing the switches and recording the voltage measurements of each cell. At least one precision voltage reference device is included to provide the ADC a reference voltage to provide self-calibration.

An input stage circuit of a three-level DC / DC converter is provided. The input stage circuit uses metal-oxide-semiconductor field effect transistors (MOSFETs) to discharge a flying capacitor to maintain the voltage across the flying capacitor at a half of the input voltage. Not only can the input stage circuit solve the high voltage issue across the flying capacitor in the prior art, but the circuit is able to operate normally without increasing power consumption during discharging, thereby avoiding problems of the prior art.

A high voltage, high power multi-level drive structure includes a plurality of neutral-point-piloted (NPP) converter cells stacked together. At least one clamping diode is connected to one or many NPP converter cell to provide a neutral-point-pilot-clamped (NPPC) converter structure. Flying capacitors connected to the NPPC converter structure yield a neutral-point-clamped-flying-capacitor converter cell structure.

A galvanically isolated signal conditioning system includes a signal conditioning circuit on an integrated circuit chip; a flying capacitor; and a galvanically isolating MEMS switching device on an integrated circuit chip for selectively switching the flying capacitor from across a pair of input terminals in one state to across the input terminals of the signal conditioning circuit in another state.

Systems and methods for supplying power at a medium voltage from an uninterruptible power supply (UPS) to a load without using a transformer are disclosed. The UPS includes an energy storage device, a single stage DC-DC converter or a two-stage DC-DC converter, and a multi-level inverter, each of which are electrically coupled to a common negative bus. The DC-DC converter may include two stages in a unidirectional or bidirectional configuration. One stage of the DC-DC converter uses a flying capacitor topology. The voltages across the capacitors of the flying capacitor topology are balanced and switching losses are minimized by fixed duty cycle operation. The DC-DC converter generates a high DC voltage from a low or high voltage energy storage device such as batteries and / or ultra-capacitors. The multi-level, neutral point, diode-clamped inverter converts the high DC voltage into a medium AC voltage using a space vector pulse width modulation (SVPWM) technique. The UPS may also include a small filter to remove harmonics in the AC voltage output from the multi-level inverter.

An apparatus for detecting a fault of a flying capacitor of an insulated condition detecting unit measures (step S1), at the start of discharge of the flying capacitor, a discharge voltage of the flying capacitor according to a charge voltage of a read capacitor. After a period from the start of discharge, the apparatus measures (step S3) a discharge voltage of the flying capacitor according to a charge voltage of the read capacitor. According to a difference between the measured discharge voltages, the apparatus obtains (step S5) a discharge amount of the flying capacitor, compares the discharge amount with a reference threshold, and diagnoses (step S7) an open fault of four capacitors that constitute the flying capacitor.

A high efficiency charge pump circuit and a power supply apparatus that can sense the output current level and change the connection of flying capacitors. The charge pump circuit includes a switching circuit that performs a switching operation of alternately switching between the charge state of charging flying capacitor from input terminal and a discharge state of discharging flying capacitor to output terminal. A flying capacitor, one end of which is connected to a connection point between two switch elements and to the other end of which a drive signal from switching circuit is applied. A detection control section detects a voltage of flying capacitor and outputs various drive signals. The charge pump circuit detects the voltage of the flying capacitor and senses the output current that is output from output terminal according to a relationship indicating the difference between the input voltage and the initial value Vc0 of the detected voltage of flying capacitor in the charge state.

An internal parallelization based active neutral point clamped (IP-ANPC) converter is provided having a low switching frequency (LSF) part and a plurality of high switching frequency (HSF) modules. The HSF modules are connected in parallel and the converter is modular. The converter provides the benefits of modularity, improved reliability and efficiency, interleaving operation, and reasonable utilization of wide band gap (WBG) devices. A logic based flying capacitor voltage balancing scheme is also provided. The balancing scheme includes naturally balancing the voltage of the converter with phase shift pulse width modulation and redundantly balancing the voltage of the converter with redundant switching states.