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56 results about "Device degradation" patented technology

The degradation device is designed to deliver separated solid material to the degradation device, in particular to the reactor device, for renewed degradation as substrate. well as methods for the fabrication of implantable degradable devices of the present invention which contain one or more degradable biopolymer fibers.

Mechanically flexible organic electroluminescent device with directional light emission

A mechanically flexible and environmentally stable organic electroluminescent (“EL”) device with directional light emission comprises an organic EL member disposed on a flexible substrate, a surface of which is coated with a multilayer barrier coating which includes at least one sublayer of a substantially transparent organic polymer and at least one sublayer of a substantially transparent inorganic material. The device includes a reflective metal layer disposed on the organic EL member opposite to the substrate. The reflective metal layer provides an increased external quantum efficiency of the device. The reflective metal layer and the multilayer barrier coating form a seal around the organic EL member to reduce the degradation of the device due to environmental elements.
Owner:BOE TECH GRP CO LTD

Hot-carrier device degradation modeling and extraction methodologies

The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of building device degradation models, including allowing the user to select a device parameter used to build the device degradation model independent of the device parameter selected. The user can also select the functional relation between stress time and degradation level. To further improve accuracy, multiple acceleration parameters can be used to account for different regions of the degradation process. Analytical functions may be used to represent aged device model parameters, either directly or by fitting measured device parameters versus device age values, allowing devices with different age values to share the same device model. The concept of binning is extended to include device degradation. In addition to a binning based on device width and length, age is added. In an exemplary embodiment, only devices with minimum channel length have degraded models constructed. The present invention also allows the degradation of one device parameter to be determined based on an age value derived from another parameter. In yet another aspect, a degraded device is modeled as a fresh device with a voltage source connected to a terminal.
Owner:CADENCE DESIGN SYST INC

Hot carrier circuit reliability simulation

The present invention is directed to a number of improvements in methods for reliability simulations in aged circuits whose operation has been degraded through hot-carrier or other effects. A plurality of different circuit stress times can be simulated within a single run. Different aging criteria may be used for different circuit blocks, circuit block types, devices, device models and device types. The user may specify the degradation of selected circuit blocks, circuit block types, devices, device models and device types independently of the simulation. Device degradation can be characterized in tables. Continuous degradation levels can be quantized. Techniques are also described for representing the aged device in the netlist as the fresh device augmented with a plurality of independent current sources connected between its terminals to mimic the effects of aging in the device. The use of device model cards with age parameters is also described. To further improve the circuit reliability simulation, a gradual or multi-step aging is used instead of the standard one step aging process. Many of these features can be embedded within the circuit simulator. A user data interface is also presented to implement these techniques and further allow users to enter their device models not presented in the simulator. For example, a proprietary model of, say, the substrate current in an NMOS could used be with a SPICE simulator employing a different model to simulate the aging of the circuit.
Owner:CADENCE DESIGN SYST INC

Method for making low-resistance silicide contacts between closely spaced electrically conducting lines for field effect transistors

A method for making reliable low-resistance contacts between closely spaced FET gate electrodes having high-aspect-ratio spacings. Polysilicon gate electrodes are formed. A conformal insulating layer is deposited and anisotropically etched back to form sidewall spacers on the gate electrodes. During conventional etch-back, the etch rate of the insulating layer between the closely spaced gate electrodes is slower resulting in a residual oxide that prevents the formation of reliable low-resistance contacts. This residual oxide requires an overetch in a hydrofluoric acid solution prior to forming silicide contacts. The wet overetch results in device degradation. A nitrogen or germanium implant is used to amorphize the oxide and to increase the wet etch rate of the residual oxide. Using this amorphization the wet etch that is commonly used as a pre-clean prior to forming silicide contacts can be used to remove the residual silicon oxide without overetching. The implant also results in a smoother interface between the silicide and the silicon substrate, which results in lower sheet resistance.
Owner:TAIWAN SEMICON MFG CO LTD

Hot-Carrier Device Degradation Modeling and Extraction Methodologies

The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of building device degradation models, including allowing the user to select a device parameter used to build the device degradation model independent of the device parameter selected. The user can also select the functional relation between stress time and degradation level. To further improve accuracy, multiple acceleration parameters can be used to account for different regions of the degradation process. Analytical functions may be used to represent aged device model parameters, either directly or by fitting measured device parameters versus device age values, allowing devices with different age values to share the same device model. The concept of binning is extended to include device degradation. In addition to a binning based on device width and length, age is added. In an exemplary embodiment, only devices with minimum channel length have degraded models constructed. The present invention also allows the degradation of one device parameter to be determined based on an age value derived from another parameter. In yet another aspect, a degraded device is modeled as a fresh device with a voltage source connected to a terminal.
Owner:LIU ZHIHONG +5

Network system health monitoring using cantor set signals

Non-invasive systems and methods monitor network system health by monitoring signals inherently on the network. These signals are deciphered and characterized using Cantor set theory such that a signature of the network is determined. Variations in the characteristics of the reflected signals indicate a network event, such as changes in network topology often due to device degradation, system failure, or physical intrusion. The source of the reflected signals can be characterized and the location on the network identified.
Owner:LOCKHEED MARTIN CORP

Apparatus and method for estimating power storage device degradation

Switches change the resistance value of a charge / discharge circuit in a period from starting a discharging at an upper limit voltage until the voltage reaches a lower limit voltage. An electric charge estimator computes electric charge by time-integrating current from a start of the discharging to an arbitrarily determined time, and computes a relationship between electric charge and voltage of a power storage device. An internal resistance estimator computes internal resistance based on voltages and currents of the storage device at times when resistance values are different. An electric energy estimator computes a relationship between electric charge and open voltage based on electric charge, voltage, current and internal resistance of the storage device. During charging or discharging of the storage device, the electric energy estimator estimates the electric energy of the power storage device based on the electric charge, the open voltage, the internal resistance, and the charge / discharge current.
Owner:MITSUBISHI ELECTRIC CORP

Numerical simulation method and system of MOS device inhomogeneous interface degeneration electric charges

The invention is applicable to the technical field of MOS devices, and provides a numerical simulation method and system of MOS device inhomogeneous interface degradation electric charges. The ground floor of software is modified, a functional model for calculating the number of the inhomogeneous interface electric charges Nit (x,t) is added, and therefore numerical simulation of influences of the inhomogeneous interface electric charges on device performance can be achieved. An interface electric charge degradation model interface is further added for achieving the numerical simulation method, and therefore the numerical simulation on the inhomogeneous interface electric charges caused by various effects can be achieved. A device parameter extraction interface is further added for achieving the numerical simulation method, and device parameters comprising threshold voltage, output characteristics, transconductance, electrons, hole concentration distribution, potential distribution, electric field distribution and the like can be extracted. According to a degradation model of an NBTI, unique change rules of the pure polarization NBTI effect under HCI stress can be disclosed, the relationship between device degradation and the service life is deeply understood, the process design is guided, and the development of reliability studying of integrated circuits can be further promoted.
Owner:SHENZHEN UNIV
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