59results about How to "Reduced hardware resource" patented technology

The present invention increases precision and recall of search engines, while decreasing hardware resources needed, using musical rhythmic analysis to detect sentiment and emotion, using poetic and metaphoric resonances with dictionary meanings, to annotate, distinguish and summarize n-grams of word meanings, then intersecting n-grams to locate mutually salient sentences, using metaphor salience analysis to cluster sentences and paragraphs into automatically named concepts, automatically characterizing quality and depth to which documents describe concepts, using editorial metrics of compassion, variety of perspectives and logical cohesion, to automatically set pricing for written works and their copyrights, and to monitor blogs and social media for newly important concepts, and provide advanced user interfaces.

A display control apparatus comprising a division unit configured to divide image data into a plurality of image data, a position information generation unit configured to generate position identification information required to identify positions of the plurality of image data divided by said division unit; and an image data transmission unit configured to transmit, in association with each other, the image data divided by said division unit and the position identification information generated by said position information generation unit for the image data to each of a plurality of display apparatuses configuring a single display screen.

The present invention relates to a video processing device comprising a luminance and saturation detector (LSHD) for detecting the luminance values (lum) and the saturation values (sat) of pixels of an input video signal (IN); and a white-point, saturation and hue modulator (WSH) for transforming luminance and saturation properties (lum, sat) of the pixels of the input video signal (IN) into white-point, saturation and hue correction factors (W, Wc; S, Sc; H, Hc). The video device also comprises a color gamut matrix generating unit (CGMG) for generating a color gamut matrix in the perception domain based on the white-point, saturation and hue correction factors (Wc, Sc, Hc) of the white-point, saturation and hue modulator (WSH); a color gamut mapping unit (20) for multiplying the pixels of the input video signal (IN) with a color gamut matrix generated by the color gamut matrix generating unit (CGMG); and a clipping unit (31) for clipping the results of the a color gamut mapping unit (20) which are out of a predefined range.

In a defect detection apparatus 1, in a reference image inspection circuit 42 compared are a reference image representing a pattern in a die which is determined as a reference on a substrate 9 and a plurality of supervisory images which represent patterns in selected block areas, respectively, to detect defects included in the reference image. Subsequently, in the target image inspection circuit 44, a target image representing a pattern in another die and the reference image are compared to detect a plurality of defect candidates included in the target image. Then, a defect detector 45 excludes defect candidates overlapping with the defects included in the reference image from the plurality of defect candidates on the basis of at least positional information of the defects included in the reference image. This makes it possible to detect defects existing in the pattern in another die accurately while eliminating effects of the defects existing in the pattern in the die which is determined as the reference.

A parallel synchronous scaling engine for multi-view 3D display and a method thereof are provided, wherein, selection and combination calculation are provided to an interpolation pixel window, then interpolation calculation is provided to a combined interpolation pixel window of a combined view field, calculation results are directly displayed on a display terminal. That is to say, interpolation is originally provided before stereoscopic pixel rearrangement, which is now improved, in such a manner that screening and combination of pixel points is provided before interpolation calculation. According to the present invention, computation and memory resource is greatly saved. The method is suitable to be implemented by hardware, for satisfying various numbers of viewpoints and interpolation algorithm, and being compatible with multi-view 3D display with the integrated and floating-point pixel arrangement, wherein the computation resource does not need to be increased with increasing of the viewpoints.

The present invention relates to a transmission rate control method of controlling a transmission rate of uplink user data to be transmitted from a mobile station to a radio base station. The method includes: starting to transmit at the mobile station, the uplink user data at an initial transmission rate which is informed from a network or an initial transmission rate which has been already informed from the network; and increasing at the mobile station the transmission rate of the uplink user data, up to a predetermined transmission rate, on a basis of a increase rule of the transmission rate which is beforehand determined.

An integrated solution in which BLAST functionality is integrated into a DBMS provides improved performance and scalability over the conventional approach, in addition to reducing the required hardware resources and reducing the cost of the system. In a database management system, a system for sequence matching and alignment comprises a database table storing sequence information comprising target sequences, a query sequence, a table function operable to accept the query sequence and match the query sequence with at least one target sequence stored in the database table, and a structured query language query referencing a database table storing sequence information comprising target sequences, a query sequence, and a table function, the structured query language query evaluatable by the database management system.

Embodiments of the present invention provide a buffer manager and a buffer management method based on an address pointer linked list. In the embodiments, address pointers of all buffer blocks in a buffer are divided into several groups, lower bits of address pointers in each group are used to record a linked list between the address pointers in the same group, and an address pointer which is pointed by one predetermined address pointer of each group and is in a different group is further recorded to upbuild a linked list between the groups. Thereby, an address linked list can still be stored without a RAM with a width equal to a pointer depth and with a depth equal to the total number of buffer blocks in the buffer as required by the conventional art, which greatly reduces hardware resources required.

An integrated solution in which BLAST functionality is integrated into a DBMS provides improved performance and scalability over the conventional approach, in addition to reducing the required hardware resources and reducing the cost of the system. In a database management system, a system for sequence matching and alignment comprises a database table storing sequence information comprising target sequences, a set of query sequences, and a table function operable to match the set of query sequences with target sequences stored in the database table, the table function having an interface including parameters.

A statistical value update unit calculates the fluctuation of measurement data. A filtering processing unit extracts a normal white noise component from the fluctuation of the measurement data using an adaptive lattice filter. A statistical test unit determines whether or not the variance of the normal white noise component is out of a predetermined scope in reference distribution. A change decision unit detects a stationary change of the status of a target system based on a detection ratio of an outlier.

In a method for generating a cryptographic key in a system-on-a-chip having a hardware-programmable logic unit, a circuit region of the hardware-programmable logic unit is configured in such a way that a first physical unclonable function is executed in the circuit region in order to generate a first cryptographic key, and the circuit region is reconfigured in such a way that (i) a further physical unclonable function is executed in order to generate a further cryptographic key or (ii) another functionality that does not encompass a physical unclonable function is executed.

A method for adjusting image is applied to an image output device. According to the method, the image output device firstly obtains a current image frame including plural pixels, and analyzes an intensity of an input image signal value of each pixel. The image output device defines each pixel having the input image signal value being smaller than a critical value as a dark pixel, and counts a number of the dark pixels to obtain a ratio of the dark pixels among all the pixels to serve as a dark pixel ratio. The image output device determines an image adjusting curve equation according to the dark pixel ratio, substitutes the input image signal values to the image adjusting curve equation, and obtains output image signal values of the pixels. Finally, the image output device combines all the output image signal values to obtain a final output image frame.

A correlator (30) for performing a correlation with a received spread spectrum signal, comprising at least an input (30.1) for inputting samples of a received signal; at least one reference code input (30.2) for inputting at least one reference code, a correlator block comprising a data shift register (36) for receiving the signal samples; a number of register groups (31) comprising a code shift register (33) for receiving at least a part of at least one reference code; and a code register (34) for receiving data from the code shift register (33); configuration pathways (201, 202, 203) for arranging the connections between the code shift register and code register (33, 34) of the register groups (31) in a reconfigurable manner.

An image processing apparatus supporting both discrete wavelet transform and discrete cosine transform with reduced hardware resources. The image processing apparatus is composed of an input unit receiving a plurality of pixel data, a controlling unit selecting a desired transform from among discrete wavelet transform and discrete cosine transform, and providing a plurality of coefficients depending on the desired transform, and a processing unit which processes the pixel data using the plurality of coefficients to achieve the desired transform.

A method for a user entity (UE) transmitting data said data being receivable by at least a serving node (B1) and a non serving node (B2); the user entity (UE) being adapted for receiving a first signal (ABS GRNT E-AGCH) (4, 6) from a serving node (B1) granting the user entity permission to transmit at a given signalling rate; the user entity (UE) being adapted for receiving a second signal (8) from a non-serving node (B2) instructing the user entity to limit its signalling rate (DOWN E-RGCH). The user entity (UE) is being adapted to transmit data packets and associating a third signal (HAPPY, 7) and the user entity (UE) is being adapted to transmit data packets and associating a fourth signal (NOT HAPPY, 1, 9) with the data packet transmission indicating the user entity wishing to being granted permission to use a higher signalling rate than it is currently being permitted to use by the serving node (B1). The user entity is being adapted for issuing a signalling rate limitation signal (UE RATE LMT, 9) to the serving node, indicating the user entity having limited its signalling rate signal below the signalling rate granted to it by the serving node B. There is moreover provided a method for a Node B, which as a non-serving Node B (B2) is transmitting on the E-RGCH, a situation signal (E-RGCH CEASE 14, 15′) being indicative of a cease ceased 9″ of an interference situation.

Provided is data transmission method and apparatus. A method for transmitting data from a first device to a second device includes detecting information on a communication environment of the first device; receiving information on a communication environment of the second device from the second device; and adjusting the QoS of the data transmission in an application layer based on at least one of the information on the communication environment of the first device and the information on the communication environment of the second device. Accordingly, when a sender transmits data to a receiver, the QoS of data transmission can be adjusted by considering communication environments of the sender and the receiver, and thus optimized data transmission can be achieved.

Method and apparatus for motion estimation for video processing. An embodiment of a method for motion estimation includes the following steps. In the course of motion estimation, integer motion estimation is performed with respect to a macroblock to generate a plurality of integer motion vectors. It is determined, according to a portion of the motion vectors, which correspond to a plurality of block modes, whether the integer motion vectors of each block mode are substantially equal to those of a corresponding upper-layer block mode of the block mode, so as to determine whether to perform or skip fractional motion estimation of the block mode, wherein each corresponding upper-layer block mode(s) of the block modes is greater than the block mode.

The invention discloses an image processing apparatus for adjusting gray levels of an image signal inputted to a flat display panel (FDP). The image processing apparatus comprises a memory unit and a processing unit. The memory unit stores a panel characteristic LUT. When receiving the image signal, the processing unit will adjust the gray levels of the image signal according to the panel characteristic LUT, so as to output an adjusted image signal complying with the panel characteristic of the FDP.

An apparatus for performing a multipath search including a plurality of time-multiplexed chip correlators, wherein each of the plurality of time-multiplexed chip correlators has a pipeline, and further wherein each of the plurality of time-multiplexed chip correlators has a accumulation time is described. A method is described for performing a multipath search including performing multipath search slot processing, determining if a current multipath searching slot is a last multipath searching slot, if the current multipath searching slot is not the last multipath searching slot, then repeating the performing step, if the current multipath searching slot is the last multipath searching slot, then initializing a multipath searching slot index, determining if an non-coherent accumulation has been completed if the accumulation has not been completed then repeating all steps and if the accumulation has been completed, then search results are sorted to locate energy peaks corresponding to multipath locations.