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1216results about How to "Reduce operating frequency" patented technology

Operating frequency reduction for transversal fir filter

A method and system for reducing the frequency of operation for a transversal Finite Impulse Response (FIR) filter is disclosed. In the preferred embodiment, the transversal filter operates in such a way that it has an even and odd row of data, which are latched on rising and falling edges of the clock respectively. This allows the clock frequency to be reduced by a factor of 2, and thus allows the use of more power efficient latches. A reduction in the frequency of operation causes the high speed latches within the transversal filter to hold the data bits twice as long as is required, which changes the desired impulse response of the FIR filter. A circuit is required to select the appropriate data bits from the output of the appropriate half-speed latch, and subsequently scale it to apply the co-efficient gain. Each of the subsystems is analog, and operates in accordance with a synchronous clock system. In a more general embodiment of the invention, the data is provided to Q shift registers that operate at a clock rate which is reduced by a factor of Q.
Owner:RAMBUS INC

Display, timing controller and data driver for transmitting serialized mult-level data signal

The present invention relates to a display, a timing controller and a data driver for transmitting a serialized multi-level data signal, and more particularly to a display, a timing controller and a data driver for transmitting a serialized multi-level data signal for reducing the number of wirings between the timing controller and the data driver, and for reducing an EMI component. The display of the present invention comprises a display panel, a scan driver, a timing controller and a plurality of data drivers, wherein the timing controller transmits a transmission signal including a serialized data signal to one of the plurality of the data drivers, wherein a level of the data signal is selected from at least four different levels according to a value of a data having a length of at least two bits, and wherein the data driver restores the data from the transmitted transmission signal.
Owner:ANAPASS

System for modulating working frequency of switch power source converter

The invention discloses a system for modulating the work frequency of a switch power converter. The system comprises an oscillator for receiving an input signal which represents the load situation of a switch power; the oscillator at least generates one first output signal, one cycle of which consists of three parts, namely a first time period, a second time period and a third time period; the first output signal boosts up during the first time period and the second time period, but falls during the third time period; wherein, the length of the second time period changes between zero and a maximum value preset along with the change of the input signal and the length of the input signal and the length of the second time period are inversely proportional. The second time period is modulated by a feedback signal so as to cause the work frequency of the switch power converter to be reduced when the switch power is under the conditions of light load and zero load, thus reducing power loss. The system of the invention can be widely applied to the switch power modulated by PWM.
Owner:TIANYU INFORMATION TECH SHANGHAI

Method for parallel computing code of CRC in multiple channels and multiple bits

The data to be calculated for the CRC code are divided to multiple data blocks with each length being as Ls digits. Each data block is input into (1,...N-1) channels. The CRC calculation is carried out for the data in each channel of the N channels so as to obtain CRC sub-code (r1, r2,...rN). The transformed CRC sub-code (R1, R2,...Rn-1) of the CRC sub-code (r1, r2,...rN) is obtained by through the lookup table of the division residue transformation. Finally, the exclusive or calculation is carried out for the CRC sub-code (R1, R2,...RN-1). Then the exclusive or calculation is carried out between the result at previous step and rN so as to obtain the CRC code of entire data to be calculated. The invention has the advantages of fast calculation speed and easy of implementation, being applicable to the CRC calculation for 10G Ethernet and 40 Gbps SDH high-speed network.
Owner:XIDIAN UNIV

Method and system for data rate optimization in a digital communication system

A method and for optimizing bit rate throughput in a digital communication system is provided. The method includes establishing a relationship between signal to noise ratio and plural symbol rates for a particular constellation size. The method also includes determining noise power spectral density (N(f)), wherein N(f) is determined during a silent period of line probing; determining Xk(f), wherein Xk(f) is determined by turning on a remote station transmit signal, after N(f) has been measured and determining residual echo Ek(f), wherein Ek(f) is determined by turning on a central station echo canceller.
Owner:MACOM TECH SOLUTIONS HLDG INC

Electronic Control Unit with Power Loss Compensation

In accordance with the described embodiments vehicular electronic control units and their operating methods are described which cost effectively compensate momentary external power loss by reducing the unit's power consumption while external power is lost. In an exemplary embodiment external power loss is detected by the electronic control unit's microprocessor. The microprocessor thereupon disables some components within the electronic control unit and operates with limited functionality for the duration of external power loss. The electronic control unit uses internal energy storage, e.g. a hold capacitor, to sustain its limited functionality operation. Upon recovery from the external power loss the electronic control unit resumes full operation.
Owner:HELLA KG HUECK & CO
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