Disclosed are device and method for enabling a programmable
semiconductor memory device to provide a block selection
transistor of a
high voltage withstand type, to prevent the
voltage from being decreased at the time of
programming and to prevent the readout current from being decreased and to provide a constant sum resistance of the
electrically conductive regions without dependency upon the
memory cell locations. In a pair of two
electrically conductive regions, provided for extending parallel to and in separation from each other on a
substrate surface, one longitudinal end of one of the
electrically conductive regions is diagonally connected to the other longitudinal end of the other electrically conductive region by a wiring to form a set of sub bit lines. On both ends of the
memory cell array, there are provided selection transistors for interconnecting the sub bit lines and main bit lines. A plural number of the sets of the sub bit lines, connecting to the selection transistors on both ends of the
memory cell array, are arranged, such that, in a region between paired electrically conductive regions (a, a) forming a set of the sub bit lines, there are provided one each (b, e) of two sets of paired electrically conductive regions forming two sets of sub bit lines connecting to two main bit lines on both sides of a given main
bit line and each one (c, d) of two sets of paired electrically conductive regions forming two sets of sub bit lines connecting to the opposite longitudinal end selection transistors. The selection transistors are isolated from one another by a
field oxide film.