35results about How to "Improve PSRR" patented technology

An amplifier having an active and passive gain stage connect to a load for driving a load according to a system analog input. A first embodiment of the amplifier in accordance with the present invention includes a logic network connected between a comparator network and a switching system, wherein the comparator network connects to the passive gain stage. Specifically, the active gain stage may include an active filter connected to receive an analog or digital input and provide a difference between the analog or digital input and the feedback signal relative to the gain factor of a gain unit connected to the active filter. The passive gain stage includes a passive filter. The logic network generates at least one switching signal which controls the switching system that includes at least one switching device to selectively provide power to the load. An output signal from the switching system provides output for the amplifier and is fed back to the active gain stage. In another embodiment, the output is a two-level signal and the passive and active filters are second order low pass filters, where the gain factor is about 25 or more. In yet another embodiment, the gain factor is approximately 250. Moreover, the amplifier may include a digital delta-sigma modulator connected to supply a two level input.

An all-digital class-D audio amplifier and method of digitizing an analog signal comprises a pulse-width modulation (PWM) wave generator for generating a PWM wave; an interpolator for receiving an input audio signal, up-sample the input audio signal; and down-sample the input audio signal to a PWM wave switching frequency; an audio speaker for broadcasting an amplified version of the input audio signal; a pair of MOSFETs driven by the PWM wave and the input supply voltage, wherein the pair of MOSFETs transmit the amplified version of the input audio signal to the audio speaker; a natural-sampling and pre-distortion circuit adapted to (i) generate a pre-distorted natural-sampling frequency point for the PWM wave switching frequency, and (ii) account for digitized power supply ripples for an input supply voltage used to drive the audio speaker; and an analog-to-digital converter (ADC) adapted to digitize the power supply ripples or distortion.

The invention relates to a high-precision output voltage-adjustable reference voltage generating circuit which comprises an output-adjustable current summation type bandgap reference voltage generating circuit, an output-adjustable current summation type difference reference voltage generating circuit and a reference voltage buffer driving circuit. The output-adjustable current summation type bandgap reference voltage generating circuit generates a bandgap reference voltage Vref for output; through the output-adjustable current summation type difference reference voltage generating circuit, difference reference voltages VTP and VTN are generated for output; and through the reference voltage buffer driving circuit, reference voltages Vrefp and Vrefn are output. Through current summation and a floating current source negative feedback control technology, the output voltage-adjustable fully differential reference voltage buffer driving circuit is designed. The buffer driving circuit is further of a structure with a source electrode push-pull output and duplicate circuit, a smaller output impedance is obtained while the power supply rejection ratio (PSRR) of the reference voltage is further improved, and the high-precision output voltage-adjustable reference voltage generating circuit has better driving capability.

The invention discloses a reference voltage generating circuit and belongs to the technical field of integrated circuits. The reference voltage generating circuit comprises a presetting circuit converting input voltage to presetting voltage and a core circuit generating reference voltage under the action of the presetting voltage. The presetting circuit comprises a first depletion mode N-channel metal oxide semiconductor transistor and a second depletion mode N-channel metal oxide semiconductor transistor, and the core circuit comprises a third depletion mode N-channel metal oxide semiconductor transistor, a fourth depletion mode N-channel metal oxide semiconductor transistor, an enhanced N-channel metal oxide semiconductor transistor and a first resistor. The circuit is simplified, the layout area is reduced, output of the reference voltage with an arbitrary value is realized, and the reference voltage generating circuit has the advantages of low power consumption, low noise, low temperature coefficient and high PSRR (power supply rejection ratio).

The invention relates to the technique of integrated circuits, in particular to a current reference circuit. The current reference circuit is characterized by comprising a first current reference unit, a second current reference unit and a maximum current selecting circuit, wherein the output end of the first current reference unit is connected with the first input end of the maximum current selecting circuit, the output end of the second current reference unit is connected with the second input end of the maximum current selecting circuit, and the output end of the maximum current selecting circuit is the output end of the current reference circuit. The current reference circuit has the advantages that by adopting a cascode current mirror, currents are copied more accurately, collector electrode voltage of an audion Q1 and collector electrode voltage of an audion Q2 are accurate and equal, the PSRR is improved, the current in the first current reference unit and the current in the second current reference unit are selected by adopting the maximum current selecting circuit, and therefore the temperature coefficient of the output currents is better. The current reference circuit is particularly suitable for current reference circuits.

The invention discloses a high-bandwidth high-PSRR low-pressure-drop linear voltage regulator. The linear voltage regulator comprises a voltage input end Vin, a reference voltage end Vref, an error amplifier EA and a power tube MP. The linear voltage regulator further comprises a feedforward circuit and an adder circuit. The feed forward circuit is connected between the voltage input end Vin and the grid electrode G of the power tube MP through the adder circuit, and the power tube MP is a PMOS power tube MP. The positive phase end of the error amplifier EA is connected with a feedback resistor. The feedback resistor is connected with a zero generation capacitor CZ in parallel. Due to the high-bandwidth high-PSRR low-pressure-drop linear voltage regulator, the voltage of the grid electrode G and the voltage of the source electrode S of the PMOS power tube MP keep unchanged, and PSRR performance is improved; besides, a second pole in the system can be eliminated by a zero generated by regulating a zero generation capacitor CZ, and therefore the stability of the system is improved.

The invention belongs to the field of analogue integrated circuits, and specifically relates to an I-V circuit of an infrared receiving module. The PSRR (power supply rejection ratio) of the circuit can be effectively reduced at the front end of the circuit, and the performance of the circuit is improved. The I-V circuit comprises an operational amplifier, the inverted input end of the operational amplifier is connected with the output end of the operational amplifier, the output end of the operational amplifier is connected with an adjustable resistor R1 and a photodiode which are connected in sequence, and two ends of the adjustable resistor R1 are voltage signal output ends respectively. The I-V circuit also comprises an MOS tube PM0 and an MOS tube PM1, the source end of the MOS tube PM0 and the source end of the MOS tube PM1 are connected and then are connected to one end of a current source, the bulk end of the MOS tube PM0 and the bulk end of the MOS tube PM1 are connected and then are connected to one end of a resistor R2, the grid end of the MOS tube PM0 and the grid end of the MOS tube PM1 are connected and then are grounded, the other end of the current source and the other end of the resistor are both connected to a power supply VDD respectively, the drain end of the MOS tube PM1 is grounded, the drain end of the MOS tube PM0 is connected to the normal-phase input end of the operational amplifier and one end of a capacitor C0, and the other end of the capacitor C0 is grounded.

A voltage regulator circuit includes a power supply terminal and a ground terminal, and a differential amplifier coupled between the power supply terminal and the ground terminal. The voltage regulator circuit also includes an output transistor, which includes a gate node coupled to an output node of the differential amplifier to receive a gate voltage and to provide a regulated output voltage at an output node of the output transistor. The differential amplifier is configured to provide the gate voltage based on a differential between a reference voltage and the regulated output voltage. The voltage regulator also includes a compensation capacitance coupled between a virtual ground node in the differential amplifier and either the power supply terminal or the ground terminal and a virtual ground node in the differential amplifier.