The invention discloses a 4H-SiC MSFET with a multi-recess buffer layer, belongs to the technical field of field effect transistors, and aims at improving the breakdown voltage and transconductance parameter of the field effect transistor and improving a DC characteristic. The MSFET comprises a 4H-SiC semi-insulating substrate, a P type buffer layer and an N type trench layer from bottom to top, a source cap layer and a drain cap layer are arranged at the two sides of the N type trench layer respectively, a source electrode and a drain electrode are arranged in the surfaces of the source cap layer and the drain cap layer respectively, a gate electrode is formed on the N type trench layer at the side close to the source cap layer, the upper end surface of the buffer layer is provided with three buffer-layer recess regions respectively in positions under the gate electrode and a gate source, under a gate-drain at the side close to the gate electrode and under the gate-drain at the side close the drain cap layer, the depths of the three buffer-layer recess regions are all 0.15 micron, and the lengths of the three buffer-layer recess regions are 1.2, 0.1 and 0.5 microns respectively.