289 results about "Software debugging" patented technology

In-circuit emulation (ICE) and software debug facilities are included in a processor via a debug interface that interfaces a target processor to a host system. The debug interface includes a trace controller that monitors signals produced by the target processor to detect specified conditions and produce a trace record of the specified conditions including a notification of the conditions are selected information relating to the conditions. The trace controller formats a trace information record and stores the trace information record in a trace buffer in a plurality of trace data storage elements. The trace data storage elements have a format that includes a trace code (TCODE) field indicative of a type of trace information and a trace data (TDATA) field indicative of a type of trace information data.

Methods and systems for safe execution of guest code in virtual machine context are presented. A method for running a virtual machine in a computing system includes (a) launching a virtual machine monitor (VMM) that uses a software debugger; (b) launching a virtual machine (VM) that can natively run safe instructions; (c) determining, at runtime, if the instruction is safe or potentially unsafe; (d) executing safe instructions in a native mode; and (e) activating control logic to process potentially unsafe instructions in the software debugger. The software debugger can bypass at least one of the potentially unsafe instructions. The potentially unsafe instructions include instructions that cannot be safely executed in the context of the VM, and instructions that can cause unpredictable results in the context of the VM.

A new approach for software debugging, verification and validation is disclosed. The present invention utilizes a knowledge-based reasoning approach to build a functional model of the software code for identifying and isolating failures in the software code. The knowledge-based reasoning approach of the present invention uses the software design, which is preferably based upon a flow chart or block diagram representation of the software functionality, to build the functional model. The software block diagram contributes to the functional model by defining the inputs and outputs of the various blocks of code, as well as defining data interconnections between the various blocks of code. In accordance with a method of the present invention, test points are strategically inserted throughout the code, and each test point is associated with a corresponding block of code. Expected values of the test points for an expected proper-operation execution of the computer program are generated. The computer program is then executed on a computer, and the actual values of the test points from the program execution are compared with the expected values of the test points. Failed test points which do not agree with corresponding expected values are determined. The functional model, which includes information functionally relating the various test points to one another, is then used to isolate the failed test points to one or more sources of failure in the code.

An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are coupled to simulators of processor cores, preferably instruction set accurate simulators. A software debugger interface permits a software application to be loaded and executed on the virtual embedded system. A virtual test bench may be coupled to the simulation to serve as a human-machine interface. In one embodiment, the IDE is provided as a web-based service for the evaluation, development and procurement phases of an embedded system project. IP components, such as processor cores, may be evaluated using a virtual embedded system. In one embodiment, a virtual embedded system is used as an executable specification for the procurement of a good or service related to an embedded system.

A method finds an error in a computer program. A plurality of execution breakpoints are set in the computer program. A portion of the execution of the computer program is simulated as recorded in the trace data in the reverse order until one a plurality of conditions is met, wherein one of the plurality of conditions is an attempt to execute a machine instruction associated with one of the plurality of execution breakpoints.

A method, system and computer program product for software debugging using annotation metadata. A set of metadata comprising source code annotation information for a software program is maintained, together with data/metadata relationships between individual units of the metadata and individual units of the source code. A software debugging point is set that is associated with debugging point metadata comprising one or more units the metadata. A debugging action is performed when execution of the software program reaches said debugging point.

In a distributed system that includes a debug server and debug clients coupled for data communications through a data communications network, where the debug server includes a debug administrator, a message router, a back-end debugger, and a debuggee, collaborative software debugging includes receiving application-level messages, including receiving, a request to establish a chat session associated with a location in source code of the debuggee; routing the application-level messages among the debug clients, the debug administrator, and the back-end debugger; returning client-specific debug results, including sending, to the debug clients, a notification of an established chat session; and administering, by the message router, chat content for the established chat session among debug clients. Debug clients display the chat content in a chat box at the location in source code when the view of source code includes the location.

A breakpoint packet is dispatched to a Network On A Chip (NOC). The breakpoint packet instructs one or more specified nodes on the NOC to place the specified nodes, or a core or hardware thread within a specified node, to execute in “single step” mode, in order to enable a debugging of a work packet that is dispatched to the specific node.

The invention relates to a method and a system used for the regulation and test of automation software, in particular to a method and a system which can automatically generate samples used for testing and can carry out the software regulation and test by a simulator. The invention can automatically form the samples used for testing in the running process of the program by adding message record, interface record, interaction message and system message between the program modules which carry out message interaction, and read and execute the memorized samples used for testing by the simulator so as to carry out the automatic site recovery, thus greatly improving the efficiency of the programme regulation and test.

The invention discloses a debug method suitable for a multiprocessor core system chip: a virtual main control processor core module (111) operating on a host machine is used to simulate a main control processor and a debugging control station program, take charge of sending and receiving commands, control the debugging of the multiprocessor core system chip, send a debugging command to a physical operation debugging service station module (131) of each processor core and receive responsive information to a software debugger (110) which runs on the host computer and is provided with a patterned interface. The debug method suitable for the multiprocessor nuclear system chip occupies small hardware resource, utilizes software to debug, has strong portability and is suitable for the network platform debugging of/on the multiprocessor nuclear system chip.