45 results about "Logic in computer science" patented technology

An automated system and method for authenticating entities or individuals engaging in automated or electronic transactions or activities such as financial transactions, accessing computer applications, computer software, data networks or other automated or electronic devices requiring identity verification is provided. A unique Personal Identity Value is computed and stored in an Identity Register for the entity or individual and may be used for a variety of applications including recognizing incidents of identity theft. This Personal Identity Value is based on one or more computer logic resources that incorporate the relationship among a variety of identification information elements and parameters associated with the entity or individual, such as the entity's or individual's wireless device location, the entity's or individual's home location, other associated locations, automated activities engaged in and applications accessed.

A controller for providing advertisements to a vehicle or a wearable housing, and a computer readable medium, when executed by one or more processors, performs an operation to provide an audio advertisement to the vehicle or wearable housing. A first signal input receives a first camera signal, a second signal input receives a second camera signal, and at least one signal output transmits to at least one acoustic transducer, which provides the audio advertisement to the user. The computer logic that may be arranged within the controller determines whether the direction of the captured images of the advertisements and the direction of the user's eye gaze correspond to one another, and, if so, the computer logic outputs the audio advertisement to the audio transducer.

Methods and systems for routing payment transactions electronically involve interrogating by computer logic each payment transaction received by a payments interface processor to identify a payment destination and a payment source and to determine, according to pre-defined parameters, whether the payment transaction is eligible for processing via an internal payment transaction processor of the financial institution that minimizes processing costs. Eligible payment transactions may be routed, for example, to an internal debit or credit card processor or ACH processor, and ineligible payment transactions may be routed to external card processing networks.

A system, computer architecture, and method of enabling asynchronous callback and broadcast notification between a server and a client software application in a network, wherein the method comprises processing computer logic instructions in the network; requesting a notification of a completion of the processing of the computer logic instructions; storing the notification request in a registry; queuing the notification request according to a response to the notification request and a list of user endpoints requesting the notification of a completion of the processing of the computer logic instructions; and notifying a recipient system of the completion of the processing of the computer logic instructions upon execution of the queued notification request.

A universal interface circuit and an associated method are provided that can supply a computer logic circuit, such as the components mounted upon an adapter card, with first and second inputs having first and second predetermined voltage levels, respectively, based upon power drawn from both first and second supply voltages. The interface circuit typically includes a first power supply circuit for providing the first input having the first predetermined voltage level in response to the first supply voltage. Additionally, the interface surface includes a regulator for generating an output having the second predetermined voltage level in response to the first supply voltage. The interface circuit further includes a second power supply circuit for providing an output that also has the second predetermined voltage level, albeit in response to the second supply voltage. In order to divide the anticipated load between the first and second supply voltages, the regulator and the second power supply circuit cooperate to provide the second input having the second predetermined voltage level in instances in which the second supply voltage is present. The interface circuit provides for the universal operation of the computer logic circuit, however, in that the regulator will provide the second input having the second predetermined voltage level in a manner independent of the second power supply circuit in instances in which the second supply voltage is unavailable.

A microcomputer logic development device realizing high speed sampling RAM monitoring by connecting an existing RAM measurement device, provided with a first block providing functions corresponding to a microcomputer core, a second block having functions corresponding to microcomputer resources, a bus connecting the first and second blocks, and a RAM measurement block provided with a common memory, connected with the bus and RAM measurement device, and realizing a RAM monitor function with respect to the first block, the RAM measurement block realizing a high speed RAM monitoring operation by dividing the timing for processing between the first block and common memory and the timing for processing between the common memory and RAM measurement device.

An integrated waveguide device that creates entanglement between a sequence of periodically spaced (in time) photons in a single input and output mode. The device consists of a polarization maintaining integrated waveguide chip containing a number of delay lines, integrated multimode interferometers with the potential for rapid switching, a polarization controller, an entangling gate, and off chip computer logic and timing. The device is capable of creating a diverse array of outputs such as linear cluster states and ring cluster states in a single output mode.

A method, apparatus and computer-readable medium for managing visual representations of relationships between active graphical areas such as text fields in a GUI and underlying software objects is presented. In one embodiment, the method includes the steps of receiving, by computer logic, a selection of an object graphical depiction of a data source software object, wherein the data source software object supports a field that is represented by a field graphical depiction in a Graphical User Interface (GUI); and in response to receiving the selection of the object graphical depiction, altering a physical appearance of the field graphical depiction, wherein altering the physical appearance of the field graphical depiction illustrates, in the GUI, a logical relationship between the data source software object and the field.

A method, apparatus and computer-readable medium for managing visual representations of relationships between active graphical areas such as text fields in a GUI and underlying software objects is presented. In one embodiment, the method includes the steps of receiving, by computer logic, a selection of an object graphical depiction of a data source software object, wherein the data source software object supports a field that is represented by a field graphical depiction in a Graphical User Interface (GUI); and in response to receiving the selection of the object graphical depiction, altering a physical appearance of the field graphical depiction, wherein altering the physical appearance of the field graphical depiction illustrates, in the GUI, a logical relationship between the data source software object and the field.

An apparatus providing an integrated waveguide device that creates entanglement between a sequence of periodically spaced (in time) photons in a single input and output mode. The invention comprises a polarization maintaining integrated waveguide chip containing a number of delay lines, integrated multimode interferometers with the potential for rapid switching, a polarization controller and off chip computer logic and timing.